| Low power design of energy efficient median filter S Basappa, PR Babu International Journal of Electronics 110 (9), 1578-1593, 2023 | 2 | 2023 |
| VLSI Implementation of LFA based Median Filter with Noise Detection Architecture for EMG Denoising PRB Mr. Sharanabasappa International Journal of Intelligent Engineering and Systems 13 (6), 156-167, 2020 | 2 | 2020 |
| A low power architecture for 1D median filter using carry look ahead adder S Basappa, PR Babu International Journal of Advanced Intelligence Paradigms 20 (1-2), 16-37, 2021 | | 2021 |
| SIMULATION AND PERFORMANCE ANALYSIS OF PUSCH IN 5G NR SR Siddlingappagouda Biradar, Sharanabasappa K Kala Sarovar 23 (2), 86-91, 2020 | | 2020 |
| A Novel Architecture for the Design of One Dimensional Filter - A Survey DPRB Sharanabasappa International Journal of Engineering Research & Technology 7 (9), 1-3, 2019 | | 2019 |
| FPGA implementation of 1D Median Filter architecture for de-noising application DPRB Mr. Sharanabasappa International Journal of Advanced Science and Technology 28 (11), 421-439, 2019 | | 2019 |
| WEARABLE REAL TIME HEALTH TRACKERS AND ASSISTED-MOBILITY FOR NON-AMBULANT PATIENTS S Vidya Shree G International Journal of Research - GRANTHAALAYAH 5 (4), 41-46, 2017 | | 2017 |
| AN EFFICIENT LOW POWER AND HIGH SPEED CARRY SELECT ADDER USING D-FLIP FLOP S Basavva Mailarappa Konnur International Journal of Latest Research in Science and Technology 5 (2 …, 2016 | | 2016 |
