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A S keerthi Nayani
A S keerthi Nayani
Matrusri Engineering College
Verified email at matrusri.edu.in
Title
Cited by
Cited by
Year
Emotion recognition through human conversation using machine learning techniques
C Sekhar, MS Rao, ASK Nayani, D Bhattacharyya
Machine Intelligence and Soft Computing: Proceedings of ICMISC 2020, 113-122, 2021
182021
Implementation of virual instrumentation for signal acquisition and processing
D Singh, ASK Nayani, MS Rajan, R Yadav, J Alanya-Beltran, ...
2022 International Conference on Innovative Computing, Intelligent …, 2022
62022
Design of 16-Bit and 32-Bit Approximate Full Adder Using Majority Logic
P Lagidi, A Iswarya, G Rajesh, ASK Nayani
2021 2nd Global Conference for Advancement in Technology (GCAT), 2021
52021
Enhancing image resolution and denoising using autoencoder
AS Keerthi Nayani, C Sekhar, M Srinivasa Rao, K Venkata Rao
Data Analytics and Management: Proceedings of ICDAM, 649-659, 2021
52021
Design and Implementation of Uart Protocol for Avionics Applications
ASK Nayani, G Nikhilesh, SST Kumar
2019 International Conference on Intelligent Computing and Control Systems …, 2019
32019
VLSI Implementation of Blanking Cover Pulse and CBCP module Propagation for External System Interface
R Anurag, ASK Nayani
2023 International Conference for Advancement in Technology (ICONAT), 1-6, 2023
2023
Lung Cancer Recognition Using CT Scan with CNN-VGG19 and PNN
MMN Mrs A S Keerthi Nayani, Mrs. G.Swapnasri
NeuroQuantology,eISSN 1303-5150 20 (Issue 10), 2654-2662, 2022
2022
Low-Power CMOS 1-Bit Full Adder using FPGA KIT & DSM Technology
ASK Nayani
Turkish Journal of Computer and Mathematics Education (TURCOMAT) 12 (3 …, 2021
2021
Implementation of Novel Floating Point Adder for High Speed DSP Applications
KP Dr. R. Prakash Rao , B. Indira Priyadarshini , N.A.S. Keerthi
Jour of Adv Research in Dynamical & Control Systems 11 (Special Issue-08 …, 2019
2019
Implementation of Audio CODEC with a Novel Design Methodology
AAR R. Prakash Rao, A. S. Keerthi Nayani, Aruna Kokkula
International Journal of Innovative Technology and Exploring Engineering …, 2019
2019
Effective food grain loss reduction technique using IOT
CHSAK A S Keerthi Nayani
International Journal of Creative Research Thoughts (IJCRT-2018), 45-49, 2018
2018
Performance Comparison of Weighted Modulo (2n +1) Adder using Different Prefix Structures
ASKNA Kokkula
6th International Conference on Research Trends in Engineering, Applied …, 2017
2017
Performance comparison of weighted modulo (2n+1) adder using different prefix structures
ASKNA KOKKULA
International Journal of Electronics, Electrical and Computational System …, 2017
2017
VLSI ARCHITECTURE FOR PARALLEL MULTIPLIERS
ASK NAYANI, A KOKKULA
International Journal of Creative Research Thoughts (IJCRT) 4 (MAY 2017), 2017
2017
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