Towards near data processing of convolutional neural networks P Das, S Lakhotia, P Shetty, HK Kapoor 2018 31st International Conference on VLSI Design and 2018 17th …, 2018 | 17 | 2018 |
A comprehensive fault diagnosis technique for reversible logic circuits B Mondal, P Das, P Sarkar, S Chakraborty Computers & Electrical Engineering 40 (7), 2259-2272, 2014 | 9 | 2014 |
CLU: A near-memory accelerator exploiting the parallelism in Convolutional Neural Networks P Das, HK Kapoor ACM Journal on Emerging Technologies in Computing Systems (JETC), 2020 | 6 | 2020 |
nZESPA: A Near-3D-Memory Zero Skipping Parallel Accelerator for CNNs P Das, HK Kapoor IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020 | 5 | 2020 |
Hydra: A near hybrid memory accelerator for CNN inference P Das, A Joshi, HK Kapoor Design, Automation and Test in Europe Conference (DATE), 2022 | 3 | 2022 |
Extended K-Map for Minimizing Multiple Output Logic Circuits D Palash, M Bikromadittya International Journal of VLSI Design & Communication Systems(VLSICS) 4, 2013 | 3* | 2013 |
Dimming Hybrid Caches to Assist in Temperature Control of Chip MultiProcessors C Joshi, P Das, A Kulkarni, HK Kapoor Proceedings of the 2020 on Great Lakes Symposium on VLSI, 2020 | 2 | 2020 |
Towards Near-Data Processing of Compare Operations in 3D-stacked memory D Palash, HK Kapoor ACM Great Lakes Symposium on VLSI (GLSVLSI), 2018 | 2 | 2018 |
ZaLoBI: Zero avoiding Load Balanced Inference accelerator HKK I. Longchar, P. Das 30th IFIP/IEEE International Conference on Very Large Scale Integration …, 2022 | 1 | 2022 |
NDIE: A Near DRAM Inference Engine Exploiting DIMM's Parallelism. P Das, HK Kapoor IEEE Asia Pacific Conference On Circuits And Systems (APCCAS), 2023 | | 2023 |
edAttack: Hardware Trojan Attack on On-Chip Packet Compression K Atul, D Dipika, D Shirshendu, D Palash IEEE Design and Test journal, 2023 | | 2023 |
ALAMNI: Adaptive LookAside Memory based Near-Memory Inference Engine for Eliminating Multiplications in Real-Time P Das, S Shashank, HK Kapoor Transactions on Computers (TC), 2022 | | 2022 |
Signature analysis for synthesis of reversible circuit P Das, B Mondal 18th International Symposium on VLSI Design and Test, 1-2, 2014 | | 2014 |