Follow
Ranjani Aruna
Title
Cited by
Cited by
Year
Implementation of multi-precision floating point divider for high speed signal processing applications
CRS Hanuman, J Kamala, AR Aruna
The Journal of Supercomputing 75, 6038-6054, 2019
22019
A novel expeditious switching circuit design for non volatile combinational circuit
AR Aruna, J Kamala, CRS Hanuman
Analog Integrated Circuits and Signal Processing 113 (3), 331-342, 2022
2022
Analysis Optimum Sizing of 12 T PCSA for High Speed Soft Error Tolerant Logic Circuits Design
AR Aruna, J Kamala, CRS Hanuman, D Vaithiyanathan
Journal of Electrical Engineering & Technology 17 (6), 3473-3485, 2022
2022
Implementation of high precision/low latency FP divider using Urdhva–Tiryakbhyam multiplier for SoC applications
CRS Hanuman, J Kamala, AR Aruna
Design Automation for Embedded Systems 24, 111-125, 2020
2020
The system can't perform the operation now. Try again later.
Articles 1–4