| Design and implementation of 16-bit carry skip adder using efficient low power high performance full adders SK Shirakol, AS Kulkarni, AF Akash, NN Amminabhavi, A Parvati Conference: Second International Conference on Emerging Research in …, 2014 | 7 | 2014 |
| Design, Implementation and Analysis of Flash Adcarchitecture with Differential Amplifier as Comparator using Custom Design Approach C Lakkannavar, SK Shirakol, KN Hosur International Journal of Electronics Signals and Systems (IJESS) ISSN 1 (3 …, 2012 | 5 | 2012 |
| FPGA-Based Implementation of Digital Filters for Image Denoising SK Shirakol, V Hiremath, SS Kerur Smart Sensors Measurements and Instrumentation: Select Proceedings of CISCON …, 2021 | 2 | 2021 |
| ARCHITECTURAL DESIGN AND OPTIMIZATION OF DISTRIBUTED ARITHMETIC BASED 2-D DISCRETE COSINE TRANSFORM S Shirakol, SS Kerur ICTACT Journal on Microelectronics 8 (01), 1275–1282, 2022 | 1 | 2022 |
| An Area-Efficient JK Flip-Flop-Based Phase Detector for Phase Measurement System Based on FPGA SS Kerur, Veeresh, SK Shirakol Innovations in Electronics and Communication Engineering: Proceedings of the …, 2022 | 1 | 2022 |
| An Improved VLSI Architectural Design of Discrete Cosine Transform Based on the Loeffler-DCT Algorithm. S Shirakol, SS Kerur International Journal of Intelligent Engineering & Systems 16 (5), 2023 | | 2023 |
| Architectural Design of Built in Self-Test for VLSI Circuits using LFSR A Angadi, S Umarani, T Sajjanar, R Karnam, K Marali, S Shirakol 2023 International Conference on Applied Intelligence and Sustainable …, 2023 | | 2023 |
| Performance optimization of dual stage algorithm for lossless data compression and decompression YK Shrikanth Shirakol, Akshata Koparde, Sandhya, Shravan Kulkarni International Journal of Engineering & Technology 7 (2.21 (2018)), 4, 2018 | | 2018 |
| Edge Detection Algorithm Using PI-Computer SU Hiremath, SP Baannadabavi, S Kabbin, S Shirakol | | 2016 |
| Design and Synthesis of Systolic Array Architecture for Matrix Multiplication SM Ganji, SK Shirakol International Journal of Engineering and Management Research (IJEMR) 6 (2 …, 2016 | | 2016 |
| Design, Implementation and Performance Analysis of 1-Bit CMOS Full Adder using GDITL SKS Umesh, Kotresh E. Marali Proceedings of second International Conference on Emerging Research in …, 2014 | | 2014 |
| Dual port SRAM GKSKS Rajeshwari Mathapati International Journal of Current Engineering and Technology, Proceedings of …, 2013 | | 2013 |
| A Decimal Floating Point Arithmetic Unit for Embedded System Applications using VLSI Techniques R Mathapati, SK Shirakol | | |
