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Dr. Satyajit Anand
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Year
2-bit magnitude comparator design using different logic styles
SA Anjuli
International Journal of Engineering Science Invention 2 (1), 13-24, 2013
412013
Designing low power wireless sensor networks: a brief survey
N Kumari, N Patel, S Anand, PP Bhattacharya
International Journal of Advanced Research in Electrical, Electronics and …, 2013
262013
Bibliometric-thematic analysis and a technology-enabler-barrier-based framework for digital supply chain
V Sharma, S Anand, M Kumar, M Pattnaik
International Journal of Value Chain Management 14 (1), 34-61, 2023
172023
A comprehensive survey on the biomedical signal processing methods for the detection of COVID-19
S Anand, V Sharma, R Pourush, S Jaiswal
Annals of Medicine and Surgery 76, 103519, 2022
102022
Automatic focal epileptic seizure detection in EEG signals
S Anand, S Jaiswal, PK Ghosh
2017 IEEE International WIE Conference on Electrical and Computer …, 2017
72017
Design of low power wake-up receiver for wireless sensor network
N Patel, S Anand, PP Bhattacharya
International Journal of Computer Applications 90 (10), 2014
72014
High-speed 64-bit CMOS binary comparator
SA Anjuli
International Journal of Innovative Systems Design and Engineering 4 (2), 45-58, 2013
72013
Epileptic Seizure Detection in EEG signal using Discrete Stationary Wavelet-Based Stockwell Transform
S Anand
Majlesi Journal of Electrical Engineering 13 (1), 55-63, 2019
62019
High-performance 64-bit binary comparator
S Anand
2014 International Conference on Reliability Optimization and Information …, 2014
42014
Optimization and Comparison of 4‐Stage Inverter, 2‐i/p NAND Gate, 2‐i/p NOR Gate Driving Standard Load By Using Logical Effort
S Anand, PK Ghosh
AIP Conference Proceedings 1324 (1), 356-359, 2010
42010
Effect of foliar spray of nutrients and growth regulators on inflorescence emergence and spathe unfurling in Anthurium andreanum vat. Temptation
S Anand, M Jawaharlal
Journal of Ornamental Horticulture 7 (3and4), 117-121, 2004
42004
A machine learning prediction model for automated brain abnormalities detection
S Anand, S Jaiswal, PK Ghosh
Recent Patents on Computer Science 11 (1), 17-24, 2018
22018
Logical effort to study the performance of 32-bit heterogeneous adder
N Agarwal, S Anand
International Journal of Computer Applications 65 (16), 2013
22013
Radix-4/-8 Dual Encoder Block for Multiplier Architecture using GDI Technique
A Dhankar, S Anand
International Journal of Advanced Research in Computer Engineering …, 2012
22012
Logical Effort to study and Compare the Performance of VLSI Adders
S Anand, PK Ghosh, M Kumar, G Dhiman
UACEE International Journal of Advances in Electronics Engineering 1, 23-27, 2011
22011
2 The recent developments in 3D bioprinting: a general bibliometric study and thematic investigation
P Sharma, S Anand, V Sharma
3D Printing Technologies: Digital Manufacturing, Artificial Intelligence …, 2024
12024
Comparative Study of different Flip Flop Cells for WSN Applications
N Kumari, S Anand, PP Bhattacharya
International Journal of Computer Applications 975, 8887, 2014
12014
High-speed 64-bit binary comparator using two different logic styles
S Anand
International Journal of Computer Applications 975, 8887, 2013
12013
High-Speed Tree-based 64-Bit Binary Comparator using New Approach
S Anand
International Journal of Computer Applications 61 (5), 2013
12013
Study and performance comparison of VLSI adders using logical effort delay model
N Agarwal, S Anand
IJATER 2 (6), 0, 2012
12012
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