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Maddipatla Hanumanthu
Maddipatla Hanumanthu
Assistant Professor, AITS (Autonomous), Rajampet
Verified email at aitsrajampet.ac.in
Title
Cited by
Cited by
Year
Design of SRAM Memory Using Revesible and GDI Logics
M Hanumanthu, K Kavya, SP Reddy, MP Kalyan, V Rohitha, NB Dastagiri
International Journal of Advanced Trends in Engineering Science and …, 2021
12021
Design and comparative analysis of domino logic styles
M Hanumanthu, NB Dastagiri, BA Rahim, P Somasundar
Indian Journal of Science and Technology, 2016
12016
Orthogonal Latin Squares Encoders and Syndrome Computation by Auto-Checking and Correcting
MH C.Sai Sindhu
International Journal of Innovative Research in Computer and Communication …, 2015
2015
Urdhva-Tiryagbhyam Sutra Multiplier Implementing by Reversible Gate Logic
D SHAVALAIAH, M HANUMANTHU
2014
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Articles 1–4