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Srinath R Naidu
Srinath R Naidu
Verified email at pilani.bits-pilani.ac.in
Title
Cited by
Cited by
Year
Statistical timing for parametric yield prediction of digital integrated circuits
JAG Jess, K Kalafala, SR Naidu, RHJM Otten, C Visweswariah
Proceedings of the 40th annual Design Automation Conference, 932-937, 2003
2122003
Minimizing stand-by leakage power in static CMOS circuits
SR Naidu, E Jacobs
Proceedings Design, Automation and Test in Europe. Conference and Exhibition …, 2001
422001
Aggregate sensitivity for statistical static timing analysis
E Tuncer, A Nardi, SR Naidu, A Antonau
US Patent 7,458,049, 2008
232008
Timing yield calculation using an impulse-train approach
SR Naidu
Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design …, 2002
232002
Use of statistical timing analysis on real designs
A Nardi, E Tuncer, S Naidu, A Antonau, S Gradinaru, T Lin, J Song
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
132007
Parameter-importance based Monte-Carlo technique for variation-aware analog yield optimization
S Kondamadugula, SR Naidu
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 51-56, 2016
92016
Accelerated evolutionary algorithms with parameterimportance based population initialization for variation-aware analog yield optimization
S Kondamadugula, SR Naidu
2016 IEEE 59th international midwest symposium on circuits and systems …, 2016
72016
Fast Approach for Iris Detection on GPU by Applying Search Localization for Circular Hough Transform
P Kumari, SR Naidu
2018 International Conference on Advances in Computing, Communications and …, 2018
62018
Speeding up monte-carlo simulation for statistical timing analysis of digital integrated circuits
SR Naidu
20th International Conference on VLSI Design held jointly with 6th …, 2007
62007
RHJM, Otten, and C
JAG Jess, K Kalafala, SR Naidu
Visweswariah,“Statistical Timing for Parametric Yield Prediction of Digital …, 2006
42006
A convex programming solution for gate-sizing with pipelining constraints
SR Naidu
Optimization and Engineering, 1-36, 2021
32021
Variation-aware parameter based analog yield optimization methods
S Kondamadugula, SR Naidu
Analog Integrated Circuits and Signal Processing 99, 123-132, 2019
32019
Customer Lifetime Value Prediction: A Study on Multiple Brands Purchase of Consumer Packaged Goods
A Ghosh, S Naidu
International Journal of Innovative Research in Applied Sciences and …, 2020
22020
Geometric programming formulation for gate sizing with pipelining constraints
SR Naidu
2015 28th International Conference on VLSI Design, 452-457, 2015
22015
Tuning for Yield
SR Naidu
Ph. D thesis, Department of Electrical Engineering, Eindhoven University of …, 2004
22004
Tuning for yield: towards predictable deep-submicron manufacturing
SR Naidu
22004
An impulse-train approach to statistical timing analysis.
SR Naidu
International Workshop on Logic and Synthesis 2001 (IWLS 2001), June 12-15 …, 2001
22001
Prediction of Intraday Trend Reversal in Stock Market Index Through Machine Learning Algorithms
KS Uma, S Naidu
Image Processing and Capsule Networks: ICIPCN 2020, 331-341, 2021
12021
Robot path planning using memory
GR Theja, SR Naidu
Innovations in Electronics and Communication Engineering: Proceedings of the …, 2019
12019
Statistical Timing for Parametric Yield Prediction of Digital Integrated Circuits
SR Naidu
IEEE, 2006
2006
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