| A novel approach to the learning of vinculum numbers in two’s compliment method for BCD arithmetic operations G Sreelakshmi, K Fatima, BK Madhavi 2018 Second International Conference on Computing Methodologies and …, 2018 | 4 | 2018 |
| Design and Implementation of Vinculum Binary Coded Decimal Multipliers using Vinculum Binary Coded Decimal Compressors G Sreelakshmi, K Fatima, BK Madhavi 2019 International Conference on Communication and Electronics Systems …, 2019 | 2 | 2019 |
| Efficient realization of vinculum vedic BCD multipliers for High speed applications G Sreelakshmi, K Fatima, BK Madhavi Circuits and Systems 9 (6), 87-99, 2018 | 2 | 2018 |
| Efficient vedic signed digit decimal adder G Sreelakshmi, M Salman, K Fatima, BK Madhavi 2018 4th International Conference on Devices, Circuits and Systems (ICDCS …, 2018 | 1 | 2018 |
| Floating Point Vedic Multiplier Using Parallel Prefix Adders for Signal Processing Applications G Sreelakshmi, V Srinath, J Mounica Journal of Innovation in Electronics and Communication Engineering 7 (2), 51-55, 2017 | | 2017 |
| A Frame Work for Decimal Floating Point Multiplier Using Vinculum Multipliers G Sreelakshmi, K Fatima, BK Madhavi New Insights into Physical Science, 152, 0 | | |
| DESIGNING OF DIGITAL CIRCUITS USING VEDIC MATHEMATICS FOR ENGINEERING APPLICATIONS G Sreelakshmi | | |
