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Usha Verma
Usha Verma
MIT Academy of Engineering, Alandi, Pune (Formerly Maharashtra Academy of Engineering)
Verified email at etx.maepune.ac.in
Title
Cited by
Cited by
Year
Hybrid mode of medical image watermarking to enhance robustness and imperceptibility
U Verma, N Sharma
International Journal of Innovative Technology and Exploring Engineering 9 …, 2019
292019
FPGA Based Implementation of Power Optimization of 32 Bit RISC Core Using DLX Architecture
S Murthy, U Verma
International Conference on. Computing, Communication, Control And …, 2015
102015
Digital image watermarking by fusion of wavelet and curvelet transform
JS Gaikwad, U Verma
Advances in Signal and Data Processing: Select Proceedings of ICSDP 2019 …, 2021
42021
Security Analysis of Medical Images using ECC over RSA
U Verma, N Sharma
Journal of University of Shanghai for Science and Technology 23 (5), 356-367, 2021
32021
Performance Analysis of Video Magnification Methods
S Yadav, P Bhalkare, U Verma
Third International Conference on Smart Systems and Inventive Technology …, 2020
32020
Fastidious fire smothering
MS Parkhi, U Verma
International Conference on Automatic Control and Dynamic Optimization …, 2016
22016
A low noise Variable Gain Amplifier
P Junwar, U Verma
International Journal of Innovation Science and Research (IJISR) 19 (1), 33-39, 2015
12015
Brain Activity Analysis for Stress Recognition
A Wakale, U Verma
Advances in Signal and Data Processing: Select Proceedings of ICSDP 2019 …, 2021
2021
Selective Fire Extinguishing
M Parkhi, U Verma
International Journal on Recent and innovation trends in computing and …, 2016
2016
A low noise-power variable gain amplifier using 0.13 mucro m CMOS technology
P Junwar, U Verma
International Journal of Industrial Electronics and Electrical Engineering …, 2015
2015
Lab-view Refrigerator Model with Capacitive UI
T George, U Verma
International Conference on. Computing, Communication, Control And …, 2015
2015
Fusion Drowsiness Detection System
A Deshmukh, U Verma
Technical Journal of The Institution of Engineers – Pune 38, 161-164, 2014
2014
FPGA based implementation of 32-bit low power RISC core, based on 5-stage Pipelined DLX Architecture
S Murthy, U Verma
Technical Journal of The Institution of Engineers (India) – Pune 38, 138-141, 2014
2014
Design and Implementation of high Performance Achitectural level low power 32-bit RISC core
S Murthy, U Verma
International Journal of Advance foundation & research in computer (IJAFRC …, 2014
2014
Real Time Detection of Drowsiness using Brain & Visual Information with Voice Alert System
A Deshmukh, U Verma
International Journal of Advances in Management, Technology & Engineering …, 2013
2013
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