| Design and implementation of blind assistance system using real time stereo vision algorithms VC Sekhar, S Bora, M Das, PK Manchi, S Josephine, R Paily 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 20 | 2016 |
| Design of low noise high speed novel dynamic analog comparator in 65nm technology A Majumder, M Das, B Nath, AJ Mondal, BK Bhattacharyya 2016 26th International Conference Radioelektronika (RADIOELEKTRONIKA), 115-120, 2016 | 12 | 2016 |
| Variation aware design of 50-Gbit/s, 5.027-fJ/bit serializer using latency combined mux-dual latch for inter-chip communication A Majumder, M Das, SK Saw, AJ Mondal, BK Bhattacharyya IEEE Transactions on Circuits and Systems I: Regular Papers 66 (3), 1231-1244, 2018 | 4 | 2018 |
| A variation tolerant current mode low swing signaling approach for gigascale on-chip interface circuit A Majumder, B Nath, M Das, BK Bhattacharyya AEU-International Journal of Electronics and Communications 93, 140-149, 2018 | 4 | 2018 |
| A 90nm Novel MUX-Dual Latch Design Approach for Gigascale Serializer Application M Das, A Majumder, AJ Mondal, BK Bhattacharyya 2017 IEEE International Symposium on Nanoelectronic and Information Systems …, 2017 | 2 | 2017 |
| Voltage Keeper Based 28.27 µW New Frequency Divider Circuit in 90nm Technology for Gigascale Serdes Application B Nath, A Majumder, M Das, AJ Mondol, P Chakraborty, ... IEEE VLSI Circuit & System Letter 3 (2), 2017 | 2 | 2017 |
| A Reconfigurable Time Multiplexed Multichannel ADC Model for Efficient Data Acquisition U Hazarika, M Das, KK Sarma 2020 International Conference on Computational Performance Evaluation (ComPE …, 2020 | 1 | 2020 |
| An energy efficient PVT aware novel CML-TG based Mux-Latch circuit Serializes high rate data A Majumder, M Das, SK Saw, BK Bhattacharyya Microsystem Technologies 27 (2), 555-568, 2021 | | 2021 |
| VLSI Circuits and Systems Letter B Nath, A Majumder, M Das, AJ Mondal, P Chakraborty, ... | | |
