| Low-area and high-throughput architecture for an adaptive filter using distributed arithmetic MS Prakash, RA Shaik IEEE Transactions on Circuits and Systems II: Express Briefs 60 (11), 781-785, 2013 | 72 | 2013 |
| An efficient distributed arithmetic-based realization of the decision feedback equalizer MS Prakash, RA Shaik, S Koorapati Circuits, Systems, and Signal Processing 35, 603-618, 2016 | 9 | 2016 |
| A distributed arithmetic based approach for the implementation of the Sign-LMS adaptive filter MS Prakash, RA Shaik 2015 International Conference on Signal Processing and Communication …, 2015 | 9 | 2015 |
| Improved convergent distributed arithmetic based low complexity pipelined least‐mean‐square filter MT Khan, RA Shaik, SP Matcha IET Circuits, Devices & Systems 12 (6), 792-801, 2018 | 8 | 2018 |
| High performance architecture for LMS based adaptive filter using distributed arithmetic M Surya Prakash, RA Shaik IPCSIT 24, 18-22, 2012 | 6 | 2012 |
| An improved dark channel prior for fast dehazing of outdoor images K Vidyamol, MS Prakash 2022 13th International Conference on Computing Communication and Networking …, 2022 | 4 | 2022 |
| A high throughput hardware architecture for deblocking filter in HEVC P Kopperundevi, MS Prakash, SR Ahamed Signal Processing: Image Communication 100, 116517, 2022 | 4 | 2022 |
| A distributed arithmetic based realization of the least mean square adaptive decision feedback equalizer with offset binary coding scheme MS Prakash, SR Ahamed Signal Processing 185, 108083, 2021 | 4 | 2021 |
| An efficient hardware architecture for deblocking filter in HEVC P Kopperundevi, M Surya Prakash Innovations in Electrical and Electronic Engineering: Proceedings of ICEEE …, 2020 | 4 | 2020 |
| Methods to develop high throughput hardware architectures for HEVC Deblocking Filter using mixed pipelined-block processing techniques P Kopperundevi, MS Prakash Microelectronics Journal 123, 105413, 2022 | 1 | 2022 |
| A Hardware Architecture for Sample Adaptive Offset Filter in HEVC P Kopperundevi, MS Prakash 2021 IEEE International Conference on Distributed Computing, VLSI …, 2021 | 1 | 2021 |
| Multiplier Design for the Modulo Set 2 n-1, 2 n, 2 n+ 1-1 and Its Application in DCT for HEVC P Kopperundevi, MS Prakash International Conference on VLSI, Signal Processing, Power Electronics, IoT …, 2022 | | 2022 |
| Residue adder design for the modulo set {2n − 1, 2n, 2n+1 − 1} and its application in DCT architecture for HEVC P Kopperundevi, MS Prakash 2022 IEEE 3rd International Conference on VLSI Systems, Architecture …, 2022 | | 2022 |
| DA based approach for the implementation of block adaptive decision feedback equaliser M Surya Prakash, RA Shaik IET Signal Processing 10 (6), 676-684, 2016 | | 2016 |
| Low complexity hardware architectural design for adaptive decision feedback equalizer using distributed arithmetic MS Prakash, RA Shaik 2012 International Conference on Computer Systems and Industrial Informatics …, 2012 | | 2012 |
| Filter paper technique in serodiagnosis of amoebiasis M Srivastva, CM Habibullah, MS Prakash Tropical gastroenterology: official journal of the Digestive Diseases …, 1983 | | 1983 |
| ABO blood groups in amoebiasis. CM Habibullah, M Ishaq, ZA Khan, MS Prakash, M Taher-uz-zaman, ... | | 1981 |
| The use of monoxenic antigen and its fractions in the diagnosis of amoebiasis by indirect haemagglutination test (IHA). ZAK Zaheer Ahmed Khan, CM Habibullah, MI Mohd. Ishaq, MS Prakash, ... | | 1980 |
| The use of monoxenic antigen and its fractions in the diagnosis of amoebiasis by indirect haemagglutination test (IHA). AK Zaheer, CM Habibullah, MS Prakash, CS Bhaskaran Proceedings of the Indian Academy of Parasitology 1 (2), 163-168, 1980 | | 1980 |
