| Novel architectures for high-speed and low-power 3-2, 4-2 and 5-2 compressors S Veeramachaneni, KM Krishna, L Avinash, SR Puppala, MB Srinivas 20th International Conference on VLSI Design held jointly with 6th …, 2007 | 194 | 2007 |
| New improved 1-bit adder cells SMBS Veeramachaneni Canadian Conference on Electrical and Computer Engineering, 735-738, 2008 | 66* | 2008 |
| Novel architectures for efficient (m, n) parallel counters S Veeramachaneni, A Lingamneni, MK Krishna, MB Srinivas Proceedings of the 17th ACM Great Lakes symposium on VLSI, 188-191, 2007 | 41 | 2007 |
| Schmitt trigger as an alternative to buffer insertion for delay and power reduction in VLSI interconnects S Saini, S Veeramachaneni, AM Kumar, MB Srinivas TENCON 2009-2009 IEEE Region 10 Conference, 1-5, 2009 | 35 | 2009 |
| Design of a low power, variable-resolution flash ADC S Veeramachanen, AM Kumar, V Tummala, MB Srinivas 2009 22nd International Conference on VLSI Design, 117-122, 2009 | 35 | 2009 |
| 2: 1 Multiplexer based design for ternary logic circuits C Vudadha, S Katragadda, PS Phaneendra 2013 IEEE Asia Pacific conference on postgraduate research in …, 2013 | 32 | 2013 |
| CNFET based ternary magnitude comparator C Vudadha, PP Sai, V Sreehari, MB Srinivas 2012 International Symposium on Communications and Information Technologies …, 2012 | 29 | 2012 |
| An Alternate Approach to Buffer Insertion for Delay and Power Reduction in VLSI Interconnects S Saini, AM Kumar, S Veeramachaneni, MB Srinivas Journal of Low Power Electronics 6 (3), 429-435, 2010 | 28 | 2010 |
| Design of prefix-based optimal reversible comparator C Vudadha, PS Phaneendra, V Sreehari, SE Ahmed, NM Muthukrishnan, ... 2012 IEEE Computer Society Annual Symposium on VLSI, 201-206, 2012 | 26 | 2012 |
| Novel, high-speed 16-digit BCD adders conforming to IEEE 754r format S Veeramachaneni, MK Krishna, L Avinash, S Reddy, MB Srinivas IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 343-350, 2007 | 26 | 2007 |
| Low-power self reconfigurable multiplexer based decoder for adaptive resolution flash adcs C Vudadha, G Makkena, MVS Nayudu, PS Phaneendra, SE Ahmed, ... 2012 25th International Conference on VLSI Design, 280-285, 2012 | 24 | 2012 |
| Novel high-speed architecture for 32-bit binary coded decimal (bcd) multiplier S Veeramachaneni, MB Srinivas 2008 International Symposium on Communications and Information Technologies …, 2008 | 22 | 2008 |
| Efficient design of 32-bit comparator using carry look-ahead logic S Veeramachaneni, MK Krishna, L Avinash, RP Sreekanth, MB Srinivas 2007 IEEE Northeast Workshop on Circuits and Systems, 867-870, 2007 | 22 | 2007 |
| Design of CNFET based ternary comparator using grouping logic C Vudadha, PS Phaneendra, G Makkena, V Sreehari, NM Muthukrishnan, ... 2012 IEEE Faible Tension Faible Consommation, 1-4, 2012 | 17 | 2012 |
| A novel high-speed binary and gray incrementer/decrementer for an address generation unit S Veeramachaneni, L Avinash, MB Srinivas 2007 International Conference on Industrial and Information Systems, 427-430, 2007 | 16 | 2007 |
| Bluetooth and Wi-Fi controlled rescue robots H Gulati, S Vaishya, S Veeramachaneni 2011 Annual IEEE India Conference, 1-5, 2011 | 14 | 2011 |
| A novel, low-power array multiplier architecture R Bajaj, S Chhabra, S Veeramachaneni, MB Srinivas 2009 9th International Symposium on Communications and Information …, 2009 | 14 | 2009 |
| An optimized design of reversible quantum comparator PS Phaneendra, C Vudadha, V Sreehari, MB Srinivas 2014 27th International Conference on VLSI Design and 2014 13th …, 2014 | 13 | 2014 |
| A modified twin precision multiplier with 2D bypassing technique SE Ahmed, S Abraham, S Veeramanchaneni, MB Srinivas 2012 International Symposium on Electronic System Design (ISED), 102-106, 2012 | 13 | 2012 |
| A high performance unified BCD and binary adder/subtractor A Singh, A Gupta, S Veeramachaneni, MB Srinivas 2009 IEEE Computer Society Annual Symposium on VLSI, 211-216, 2009 | 13 | 2009 |
M B SrinivasBITS Pilani, Dubai CampusVerified email at dubai.bits-pilani.ac.in
