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Dr. Jitesh R. Shinde
Dr. Jitesh R. Shinde
Associate Professor, CSMSS Shahu College of Engineering , Chh. Sambhajinagar, Maharashtra,India
Verified email at csmssengg.org - Homepage
Title
Cited by
Cited by
Year
Clock gating—A power optimizing technique for VLSI circuits
J Shinde, SS Salankar
2011 annual IEEE India conference, 1-4, 2011
1552011
A power and delay efficient circuit for CMOS phase detector and phase frequency detector
S Valasa, JR Shinde, DR Ramji, S Avunoori
2021 6th international conference on communication and electronics systems …, 2021
112021
Design and simulation of smart flooring tiles using two-phased triangular bimorph piezoelectric energy harvester
M Krishnasamy, JR Shinde, HP Mohammad, U Deepesh, TR Lenka
2020 IEEE-HYDCON, 1-4, 2020
92020
Multi-objective optimization for VLSI circuits
JR Shinde, S Salankar
2014 International Conference on Computational Intelligence and …, 2014
92014
Smart Hands-Free Waste Compactor Bin for Public Places
DR Ramji, JR Shinde, R Venkateswarlu
International Journal of Digital Electronics 5 (2), 46-52, 2019
82019
Multi-objective optimization domino techniques for VLSI circuit
JR Shinde, SS Salankar, SJ Shinde
2016 International Conference on Advances in Computing, Communications and …, 2016
82016
VLSI implementation of neural network
JR Shinde, S Salankar
Current Trends in Technology and Science 4 (3), 515-524, 2015
82015
Optimal multi-objective approach for VLSI implementation of digital FIR filters
J Shinde, S Salankar
International Journal of Engineering Research & Technology (IJERT) 3, 2470-74, 2014
82014
An optimization design strategy for Arithmetic Logic Unit
JR Shinde, SJ Shinde
Universal Journal of Electrical and Electronic Engineering 6 (1), 1-13, 2019
62019
Biometrics: overview and potential use for E-governance services
SJ Shinde, J Shinde, MM Kharade, H Dhanashree
Int J Adv Res Comput Sci Softw Eng 4 (6), 1145-1151, 2014
62014
VLSI implementation of bit serial architecture based multiplier in floating point arithmetic
JR Shinde, SS Salankar
2015 International Conference on Advances in Computing, Communications and …, 2015
52015
On-the-fly key generation based VLSI implementation of advanced encryption standard
S Valasa, S Avunoori, JR Shinde
2021 6th International Conference on Communication and Electronics Systems …, 2021
42021
Multi-objective optimization for VLSI implementation of artificial neural network
JR Shinde, S Salankar
2015 International Conference on Advances in Computing, Communications and …, 2015
42015
Comparative Analysis Domino Logic Based Techniques For VLSI Circuit
JS Shilpa Shinde
INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY 12 (8), 3803-3808, 2014
32014
An Optimization Design Approach for Arithmetic Logic Unit
JRSSSL Dash
ICICCT 2019 – System Reliability, Quality Control, Safety, Maintenance and …, 2019
2*2019
Design and Analysis of FEM Novel X-Shaped Broadband Linear Piezoelectric Energy Harvester
M Krishnasamy, JR Shinde, HP Mohammad, G Amarnath, TR Lenka
Micro and Nanoelectronics Devices, Circuits and Systems: Select Proceedings …, 2022
12022
An improved impulse noise removal VLSI architecture using DTBDM method
S Valasa, DR Ramji, J Shinde, M Mudavath
Data Engineering and Communication Technology: Proceedings of ICDECT 2020 …, 2021
12021
Defense Strategy Security Mechanism for Sensor Networks
RN Dr. Jitesh Shinde
Lecture Notes of the Institute for Computer Sciences, SociInformatics and …, 2025
2025
Design Approaches for Real-Time Tracking System for Under-Cast Mines
SS Jitesh Shinde, Raj Vardhan
The Indian Journal of Technical Education 47 (2), 150-158, 2024
2024
A Case Study on the Application of Machine Learning to the Process of Crop Forecasting
SA Jiwani, J Shinde, B Bag, R Nayak, RK Shial, U Ghugar
2024 OPJU International Technology Conference (OTCON) on Smart Computing for …, 2024
2024
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