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S. Sivanantham
S. Sivanantham
Professor and Dean, School of Electronics Engineering, Vellore Institute of Technology, Vellore
Verified email at vit.ac.in
Title
Cited by
Cited by
Year
Object tracking algorithm implementation for security applications
S Sivanantham, NN Paul, RS Iyer
Far East Journal of Electronics and Communications 16 (1), 1, 2016
332016
Enhancement of test data compression with multistage encoding
S Sivanantham, M Padmavathy, G Gopakumar, PS Mallick, JRP Perinbam
Integration 47 (4), 499-509, 2014
202014
Low power floating point computation sharing multiplier for signal processing applications
S Sivanantham, KJ Naidu, S Balamurugan, DB Phaneendra
International Journal of Engineering and Technology 5 (2), 979-85, 2013
202013
Low power reconfigurable multiplier with reordering of partial products
MVP Kumar, S Sivanantham, S Balamurugan, PS Mallick
2011 International Conference on Signal Processing, Communication, Computing …, 2011
202011
Design and implementation of 16× 16 modified booth multiplier
V Harikiran, K Manikanta, S Sivanantham, K Sivasankaran
2015 Online International Conference on Green Engineering and Technologies …, 2015
192015
Two-stage low power test data compression for digital VLSI circuits
K Thilagavathi, S Sivanantham
Computers & Electrical Engineering 71, 309-320, 2018
172018
Handbook of Research on Fuzzy and Rough Set Theory in Organizational Decision Making
AK Sangaiah, XZ Gao, A Abraham
IGI Global, 2016
122016
Home automation through FPGA controller
S Sharma, J Boddu, GS Charan, S Sharma, S Sivanantham, ...
2015 Online International Conference on Green Engineering and Technologies …, 2015
122015
Low-power selective pattern compression for scan-based test applications
S Sivanantham, PS Mallick, JRP Perinbam
Computers & Electrical Engineering 40 (4), 1053-1063, 2014
122014
Partial reconfigurable implementation of IEEE802. 11g OFDM
S Sivanantham, R Adarsh, S Bhargav, KJ Naidu
Indian Journal of Science and Technology, 63-70, 2014
112014
FPGA implementation of edge detection using canny algorithm
R Jeyakumar, M Prakash, S Sivanantham, K Sivasankaran
2015 Online International Conference on Green Engineering and Technologies …, 2015
92015
Energy conservation using automatic lighting system using FPGA
P Rodi, L Chandrakar, SSG Sivanantham, K Sivasankaran
2015 Online International Conference on Green Engineering and Technologies …, 2015
92015
Adaptive Low Power RTPG for BIST based test applications
RT John, KD Sreekanth, S Sivanantham
2013 International Conference on Information Communication and Embedded …, 2013
92013
Design of low power floating point multiplier with reduced switching activity in deep submicron technology
S Sivanantham
International Journal of Applied Engineering Research 8 (7), 851-59, 2013
92013
Reduction of testing power with pulsed scan flip-flop for scan based testing
DS Valibaba, S Sivanantham, PS Mallick, JRP Perinbam
2011 International Conference on Signal Processing, Communication, Computing …, 2011
92011
A novel approach for simultaneous reduction of shift and capture power for scan based testing
S Sivanantham, V Sandeep, PS Mallick, JRP Perinbam
2011 International Conference on Signal Processing, Communication, Computing …, 2011
92011
An efficient single precision floating point multiplier architecture based on classical recoding algorithm
JJJ Nesam, S Sathasivam
Indian Journal of Science and Technology, 2016
82016
Implementation of Blake 256 hash function for password encryption and parallel CRC
F Fernandes, R Gupta, S Sivanantham, K Sivasankaran
2015 Online International Conference on Green Engineering and Technologies …, 2015
82015
Study of approximate compressors for multiplication using FPGA
J Mody, R Lawand, R Priyanka, S Sivanantham, K Sivasankaran
2015 Online International Conference on Green Engineering and Technologies …, 2015
82015
Design of floating point multiplier for signal processing applications
AR Babu, R Saikiran, S Sivanantham
Int J of Applied Engineering Research 8 (6), 715-722, 2013
82013
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