| Multi-frequency electrical impedance tomography system with automatic self-calibration for long-term monitoring H Wi, H Sohal, AL McEwan, EJ Woo, TI Oh IEEE transactions on biomedical circuits and systems 8 (1), 119-128, 2013 | 144 | 2013 |
| Performance evaluation of wideband bio-impedance spectroscopy using constant voltage source and constant current source Y Mohamadou, TI Oh, H Wi, H Sohal, A Farooq, EJ Woo, AL McEwan Measurement Science and Technology 23 (10), 105703, 2012 | 50 | 2012 |
| Design of a microscopic electrical impedance tomography system for 3D continuous non-destructive monitoring of tissue culture EJ Lee, H Wi, AL McEwan, A Farooq, H Sohal, EJ Woo, JK Seo, TI Oh Biomedical engineering online 13, 1-15, 2014 | 23 | 2014 |
| Electrical impedance imaging system using FPGAs for flexibility and interoperability H Sohal, H Wi, AL McEwan, EJ Woo, TI Oh Biomedical engineering online 13, 1-14, 2014 | 21 | 2014 |
| Comparative analysis of heart rate variability parameters for arrhythmia and atrial fibrillation using ANOVA H Sohal, S Jain Biomedical and Pharmacology Journal 11 (4), 1841-1849, 2018 | 18 | 2018 |
| Sleepy CMOS-sleepy stack (SC-SS): a novel high speed, area and power efficient technique for VLSI circuit design A Sharma, H Sohal, H Jit Kaur Journal of Circuits, Systems and Computers 28 (12), 1950197, 2019 | 16 | 2019 |
| A novel ASIC-based variable latency speculative parallel prefix adder for image processing application G Thakur, H Sohal, S Jain Circuits, Systems, and Signal Processing 40 (11), 5682-5704, 2021 | 15 | 2021 |
| A novel parallel prefix adder for optimized Radix-2 FFT processor G Thakur, H Sohal, S Jain Multidimensional Systems and Signal Processing 32, 1041-1063, 2021 | 15 | 2021 |
| FPGA-based parallel prefix speculative adder for fast computation application G Thakur, H Sohal, S Jain 2020 Sixth International Conference on Parallel, Distributed and Grid …, 2020 | 15 | 2020 |
| FPGA implementation of Power-Efficient ECG pre-processing block H Sohal, S Jain Jaypee University of Information Technology, Solan, HP, 2019 | 15 | 2019 |
| Design and analysis of high-speed parallel prefix adder for digital circuit design applications G Thakur, H Sohal, S Jain 2020 International Conference on Computational Performance Evaluation (ComPE …, 2020 | 14 | 2020 |
| Considerations for ultra-low-power VLSI design—A survey A Sharma, H Sohal Journal of Nanoelectronics and Optoelectronics 12 (1), 1-21, 2017 | 13 | 2017 |
| Area and power analysis of adiabatic 2×1 multiplexer design on 65nm CMOS technology A Sharma, H Sohal, K Sharma 2016 5th International Conference on Wireless Networks and Embedded Systems …, 2016 | 12 | 2016 |
| Design and implementation of robust low power ECG pre-processing module K Tripathi, H Sohal, S Jain IETE Journal of Research 68 (4), 2716-2722, 2022 | 11 | 2022 |
| Interpretation of cardio vascular diseases using electrocardiogram: A study H Sohal, S Jain 2018 fifth international conference on parallel, distributed and grid …, 2018 | 10 | 2018 |
| Impact of various weather condition on the performance of free space optical communication system N Kumar, H Sohal Journal of Optical Communications 35 (1), 45-49, 2014 | 9 | 2014 |
| High Speed RADIX-2 Butterfly Structure Using Novel Wallace Multiplier T Garima, S Harsh, J Shruti International Journal of Engineering & Technology 7 (Special Issue 4), 213-217, 2018 | 8* | 2018 |
| FPGA implementation of collateral and sequence pre-processing modules for low power ECG denoising module H Sohal, S Jain Informatics in Medicine Unlocked 28, 100838, 2022 | 7 | 2022 |
| Design and comparative performance analysis of various multiplier circuit G Thakur, H Sohal, S Jain Journal of Scientific and Engineering Research 5 (7), 340-349, 2018 | 7 | 2018 |
| An efficient design of 8-bit high speed parallel prefix adder G Thakur, H Sohal, S Jain Research Journal of science and technology 10 (2), 105-114, 2018 | 7 | 2018 |
Alistair McEwanSydney UniversityVerified email at sydney.edu.au
