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Prof. Anirban Sengupta, Fellow IET, Fellow BCS, Fellow IETE, SMIEEE
Prof. Anirban Sengupta, Fellow IET, Fellow BCS, Fellow IETE, SMIEEE
Full Professor, CSE, Indian Institute of Technology (IIT) Indore
Verified email at iiti.ac.in - Homepage
Title
Cited by
Cited by
Year
An overview of hardware security and trust: Threats, countermeasures, and design tools
W Hu, CH Chang, A Sengupta, S Bhunia, R Kastner, H Li
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
1242020
Tunnel-enabled elastic service model
J Jayant, A Sengupta, R Lund, R Koganty, X Hong, M Parthasarathy
US Patent 11,296,930, 2022
792022
TL-HLS: methodology for low cost hardware Trojan security aware scheduling with optimal loop unrolling factor during high level synthesis
A Sengupta, S Bhadauria, SP Mohanty
IEEE Transactions on computer-aided design of integrated circuits and …, 2016
682016
Exploring low cost optimal watermark for reusable IP cores during high level synthesis
A Sengupta, S Bhadauria
IEEE Access 4, 2198-2215, 2016
672016
MO-PSE: Adaptive multi-objective particle swarm optimization based design space exploration in architectural synthesis for application specific processor design
VK Mishra, A Sengupta
Advances in Engineering Software 67, 111-124, 2014
612014
Everything you want to know about watermarking: From paper marks to hardware protection
SP Mohanty, A Sengupta, P Guturu, E Kougianos
IEEE consumer electronics magazine 6 (3), 83-91, 2017
602017
DSP design protection in CE through algorithmic transformation based structural obfuscation
A Sengupta, D Roy, SP Mohanty, P Corcoran
IEEE Transactions on Consumer Electronics 63 (4), 467-476, 2017
552017
Distributing remote device management attributes to service nodes for service rule processing
J Jayant, A Sengupta, S Nimmagadda, AS Tiagi, K Kumar
US Patent 9,906,560, 2018
482018
Nano toolbox in immune modulation and nanovaccines
M Azharuddin, GH Zhu, A Sengupta, J Hinkula, NKH Slater, HK Patra
Trends in Biotechnology 40 (10), 1195-1212, 2022
432022
IP core steganography for protecting DSP kernels used in CE systems
A Sengupta, M Rathor
IEEE Transactions on Consumer Electronics 65 (4), 506-515, 2019
412019
Integrated scheduling, allocation and binding in high level synthesis using multi structure genetic algorithm based design space exploration
A Sengupta, R Sedaghat
2011 12th International Symposium on Quality Electronic Design, 1-9, 2011
412011
Large receive offload for virtual machines
J Jayant, A Sengupta, W Wu
US Patent 9,384,033, 2016
402016
A high level synthesis design flow with a novel approach for efficient design space exploration in case of multi-parametric optimization objective
A Sengupta, R Sedaghat, Z Zeng
Microelectronics Reliability 50 (3), 424-437, 2010
402010
A multi structure genetic algorithm for integrated design space exploration of scheduling and allocation in high level synthesis for DSP kernels
A Sengupta, R Sedaghat, P Sarkar
Swarm and Evolutionary Computation 7, 35-46, 2012
372012
Distributed identity-based firewalls
A Sengupta, S Manuguri, MT Christensen, A Feroz, T Sabin
US Patent 10,033,693, 2018
362018
Triple-phase watermarking for reusable IP core protection during architecture synthesis
A Sengupta, D Roy, SP Mohanty
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
352017
Hardware security of CE devices [hardware matters]
A Sengupta
IEEE Consumer Electronics Magazine 6 (1), 130-133, 2016
352016
Embedding digital signature using encrypted-hashing for protection of DSP cores in CE
A Sengupta, ER Kumar, NP Chandra
IEEE Transactions on Consumer Electronics 65 (3), 398-407, 2019
322019
Antipiracy-aware ip chipset design for ce devices: A robust watermarking approach [hardware matters]
A Sengupta, D Roy
IEEE Consumer Electronics Magazine 6 (2), 118-124, 2017
322017
Efficacy and immune response elicited by gold nanoparticle-based nanovaccines against infectious diseases
A Sengupta, M Azharuddin, N Al-Otaibi, J Hinkula
Vaccines 10 (4), 505, 2022
312022
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