| Optimal energy aware clustering in sensor networks S Ghiasi, A Srivastava, X Yang, M Sarrafzadeh Sensors 2 (7), 258-269, 2002 | 569 | 2002 |
| Handbook of algorithms for physical design automation CJ Alpert, DP Mehta, SS Sapatnekar CRC press, 2008 | 365 | 2008 |
| Neural trojans Y Liu, Y Xie, A Srivastava 2017 IEEE International Conference on Computer Design (ICCD), 45-48, 2017 | 354 | 2017 |
| Mitigating SAT attack on logic locking Y Xie, A Srivastava Cryptographic Hardware and Embedded Systems–CHES 2016: 18th International …, 2016 | 318 | 2016 |
| Anti-SAT: Mitigating SAT attack on logic locking Y Xie, A Srivastava IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 219 | 2018 |
| On reverse engineering-based hardware Trojan detection C Bao, D Forte, A Srivastava IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 181 | 2015 |
| On application of one-class SVM to reverse engineering-based hardware Trojan detection C Bao, D Forte, A Srivastava Fifteenth International Symposium on Quality Electronic Design, 47-54, 2014 | 167 | 2014 |
| Temperature tracking: An innovative run-time approach for hardware Trojan detection D Forte, C Bao, A Srivastava 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 532-539, 2013 | 161 | 2013 |
| DRAMsim3: A cycle-accurate, thermal-capable DRAM simulator S Li, Z Yang, D Reddy, A Srivastava, B Jacob IEEE Computer Architecture Letters 19 (2), 106-109, 2020 | 160 | 2020 |
| Activity-driven clock design AH Farrahi, C Chen, A Srivastava, G Téllez, M Sarrafzadeh IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001 | 138 | 2001 |
| A general framework for accurate statistical timing analysis considering correlations V Khandelwal, A Srivastava Proceedings of the 42nd annual Design Automation Conference, 89-94, 2005 | 134 | 2005 |
| On gate level power optimization using dual-supply voltages C Chen, A Srivastava, M Sarrafzadeh IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9 (5), 616-629, 2001 | 134 | 2001 |
| Delay locking: Security enhancement of logic locking against ic counterfeiting and overproduction Y Xie, A Srivastava Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 130 | 2017 |
| The hardware trojan war S Bhunia, M Tehranipoor Cham,, Switzerland: Springer, 2018 | 117 | 2018 |
| Leakage control through fine-grained placement and sizing of sleep transistors V Khandelwal, A Srivastava IEEE transactions on computer-aided design of integrated circuits and …, 2007 | 117 | 2007 |
| Keynote: A disquisition on logic locking A Chakraborty, NG Jayasankaran, Y Liu, J Rajendran, O Sinanoglu, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 106 | 2019 |
| Handbook of Energy-Aware and Green Computing, Volume 1 I Ahmad, S Ranka CRC Press, 2012 | 105 | 2012 |
| Temperature tracking: Toward robust run-time detection of hardware Trojans C Bao, D Forte, A Srivastava IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 98 | 2015 |
| Hardware protection through obfuscation D Forte, S Bhunia, MM Tehranipoor Springer International Publishing, 2017 | 93 | 2017 |
| Variability driven gate sizing for binning yield optimization A Davoodi, A Srivastava Proceedings of the 43rd annual Design Automation Conference, 959-964, 2006 | 88 | 2006 |
