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Kanchan Manna
Kanchan Manna
BITS-Pilani Goa, Dept. of CSIS
Verified email at goa.bits-pilani.ac.in - Homepage
Title
Cited by
Cited by
Year
Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization
PK Sahu, T Shah, K Manna, S Chattopadhyay
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 300-312, 2014
1422014
Extending Kernighan–Lin partitioning heuristic for application mapping onto Network-on-Chip
PK Sahu, K Manna, N Shah, S Chattopadhyay
Journal of Systems Architecture 60 (7), 562-578, 2014
462014
A new application mapping algorithm for mesh based Network-on-Chip design
PK Sahu, N Shah, K Manna, S Chattopadhyay
2010 Annual IEEE India Conference (INDICON), 1-4, 2010
372010
Thermal-aware Application Mapping Strategy for Network-on-Chip based System Design
K Manna, P Mukherjee, S Chattopadhyay, I Sengupta
IEEE Transaction on Computers (TC) 67 (4), 528–542, 2018
342018
A spare router based reliable Network-on-Chip design
N Chatterjee, S Chattopadhyay, K Manna
IEEE International Symposium on Circuits and Systems (ISCAS), 1957-1960, 2014
232014
Integrated Through Silicon Via Placement and Application Mapping for 3D Mesh Based NoC Design
K Manna, S Swami, S Chattopadhyay, I Sengupta
ACM Transactions on Embedded Computing Systems (TECS) 16 (1), 24:1-24:25, 2016
202016
Thermal variance-aware application mapping for mesh based network-on-chip design using Kernighan-Lin partitioning
K Manna, V Choubey, S Chattopadhyay, I Sengupta
International Conference on Parallel, Distributed and Grid Computing (PDGC …, 2014
182014
A comparative performance evaluation of network-on-chip architectures under self-similar traffic
S Kundu, K Manna, S Gupta, K Kumar, R Parikh, S Chattopadhyay
Advances in Recent Technologies in Communication and Computing, 2009. ARTCom …, 2009
182009
In-field Test for Permanent Faults in FIFO Buffers of NoC Routers
B Ghosal, K Manna, S Chattopadhyay, I Sengupta
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 393-397, 2016
172016
A Constructive Heuristic for Application Mapping onto Mesh based Network-on-Chip
PK Sahu, K Manna, T Shah, S Chattopadhyay
Journal of Circuits, Systems, and Computers (JCSC), 2015
172015
Through silicon via placement and mapping strategy for 3D mesh based Network-on-Chip
K Manna, S Chattopadhyay, I Sengupta
22nd International Conference on Very Large Scale Integration (VLSI-SoC), 1-6, 2014
162014
An application mapping technique for butterfly-fat-tree network-on-chip
PK Sahu, N Shah, K Manna, S Chattopadhyay
Second International Conference on Emerging Applications of Information …, 2011
162011
TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning
K Manna, VS Teja, S Chattopadhyay, I Sengupta
IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 392-397, 2015
132015
Mesh-of-Tree based scalable network-on-chip architecture
S Kundu, RP Dasari, S Chattopadhyay, K Manna
Industrial and Information Systems, 2008. ICIIS 2008. IEEE Region 10 and the …, 2008
132008
Energy and performance evaluation of a dimension order routing algorithm for Mesh-of-Tree based Network-on-Chip architecture
K Manna, S Chattopadhyay, IS Gupta
2010 Annual IEEE India Conference (INDICON), 2010
122010
Application Mapping onto Butterfly-Fat-Tree based Network-on-Chip using Discrete Particle Swarm Optimization
PK Sahu, K Manna, S Chattopadhyay
International Journal of Computer Applications (IJCA), 2015
112015
Application Driven Routing for Mesh Based Network-on-Chip Architectures
A Gogoi, B Ghoshal, A Sachan, R Kumar, K Manna
Elsevier, Integration 84, 26-36, 2021
102021
A new application mapping strategy for mesh-of-tree based Network-on-Chip
PK Sahu, N Shah, K Manna, S Chattopadhyay
Emerging Trends in Electrical and Computer Technology (ICETECT), 2011 …, 2011
102011
Congestion-Aware Vertical Link Placement and Application Mapping Onto Three-Dimensional Network-On-Chip Architectures
S Ramesh, K Manna, VC Gogineni, S Chattopadhyay, S Mahapatra
IEEE Transactions on Computer-Aided Design (CAD) of Integrated Circuits and …, 2024
82024
Thermal-aware Multifrequency Network-on-Chip Testing using Particle Swarm Optimization
K Manna, C Veeramreddy, S Chattopadhyay, I Sengupta
International Journal of High Performance Systems Architecture, 2015
82015
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