| Dielectric Modulated Junctionless Biotube FET (DM-JL-BT-FET) Bio-Sensor A Goel, S Rewari, S Verma, SS Deswal, RS Gupta IEEE Sensors Journal, 2021 | 50 | 2021 |
| Temperature-dependent gate-induced drain leakages assessment of dual-metal nanowire field-effect transistor—analytical model A Goel, S Rewari, S Verma, RS Gupta IEEE Transactions on Electron Devices 66 (5), 2437-2445, 2019 | 41 | 2019 |
| High-K spacer dual-metal gate stack underlap junctionless gate all around (HK-DMGS-JGAA) MOSFET for high frequency applications A Goel, S Rewari, S Verma, RS Gupta Microsystem Technologies 26, 1697-1705, 2020 | 38 | 2020 |
| Shallow extension engineered dual material surrounding gate (SEE-DM-SG) MOSFET for improved gate leakages, analysis of circuit and noise performance A Goel, S Rewari, S Verma, RS Gupta AEU-International Journal of Electronics and Communications 111, 152924, 2019 | 31 | 2019 |
| Novel dual-metal junctionless nanotube field-effect transistors for improved analog and low-noise applications A Goel, S Rewari, S Verma, RS Gupta Journal of Electronic Materials 50, 108-119, 2021 | 29 | 2021 |
| Physics-based analytic modeling and simulation of gate-induced drain leakage and linearity assessment in dual-metal junctionless accumulation nano-tube FET (DM-JAM-TFET) A Goel, S Rewari, S Verma, RS Gupta Applied Physics A 126, 1-14, 2020 | 29 | 2020 |
| Modeling of shallow extension engineered dual metal surrounding gate (SEE-DM-SG) MOSFET gate-induced drain leakage (GIDL) A Goel, S Rewari, S Verma, RS Gupta Indian Journal of Physics 95, 299-308, 2021 | 25 | 2021 |
| Dielectric modulated triple metal gate all around MOSFET (TMGAA) for DNA bio-molecule detection A Goel, S Rewari, S Verma, RS Gupta 2018 IEEE Electron Devices Kolkata Conference (EDKCON), 337-340, 2018 | 21 | 2018 |
| Enhanced analog performance and high-frequency applications of dielectric engineered high-K Schottky nanowire FET S Sharma, A Goel, S Rewari, V Nath, RS Gupta Silicon 14 (15), 9733-9749, 2022 | 10 | 2022 |
| SiC‐based analytical model for gate‐stack dual metal nanowire FET with enhanced analog performance Neeraj, A Goel, S Sharma, S Rewari, RS Gupta International Journal of Numerical Modelling: Electronic Networks, Devices …, 2022 | 6 | 2022 |
| Characterisation and analysis of Schottky-tube FET exhibiting superior characteristic parameters S Sharma, A Goel, S Rewari, V Nath, RS Gupta Arabian Journal for Science and Engineering 48 (1), 907-917, 2023 | 5 | 2023 |
| Gallium Nitride Cylindrical Schottky Barrier MOSFET(GaN-CSB-MOSFET) For High-Frequency Implementation S Sharma, A Goel, S Rewari, V Nath, RS Gupta International Conference on Industrial Electronics Research and Applications …, 2021 | 5 | 2021 |
| Gate-stack dual metal (DM) nanowire FET with enhanced analog performance for high frequency applications S Sharma, A Goel, S Rewari, RS Gupta 2021 Devices for Integrated Circuit (DevIC), 373-377, 2021 | 4 | 2021 |
| Physics based analytical modeling and simulation of Cylindrical Junctionless Nanowire Ferroelectric field effect transistor (CJNFe-FET) for enhanced analog performance S Garg, J Kaur, A Goel, S Haldar, RS Gupta Microsystem Technologies, 1-13, 2023 | 3 | 2023 |
| Quantum effect dependent modelling of short channel junctionless double gate stack (SC-JL-DG) MOSFET for high frequency analog applications P Udar, A Goel, RS Gupta, I Life Senior Member Microelectronics Journal 134, 105726, 2023 | 3 | 2023 |
| GaN based Dual-Metal Gate Stack Engineered Junctionless-Surrounding-Gate (DMSEJSG) MOSFET for High Power Applications A Goel, S Rewari, S Verma, RS Gupta 2019 IEEE 16th India Council International Conference (INDICON), 1-4, 2019 | 3 | 2019 |
| Temperature sensitive analytical analysis of gate‐stack dual metal nanowire field‐effect transistor (4H‐SiC) Neeraj, S Sharma, A Goel, S Rewari, RS Gupta International Journal of Numerical Modelling: Electronic Networks, Devices …, 2023 | 2 | 2023 |
| Linearity and intermodulation distortion assessment of underlap engineered cylindrical junctionless surrounding gate MOSFET for low noise CMOS RFIC design S Rewari, A Goel, S Verma, RS Gupta 2019 IEEE 16th India council international conference (INDICON), 1-4, 2019 | 2 | 2019 |
| Improved analog and AC performance for high frequency linearity based applications using gate-stack dual metal (DM) nanowire (NW) FET (4H-SiC) N Neeraj, S Sharma, A Goel, S Rewari, RS Gupta Microsystem Technologies 29 (10), 1403-1416, 2023 | 1 | 2023 |
| Temperature Sensitive Analysis of Junctionless Nanowire Ferroelectric Field Effect Transistor (JNFe-FET) for Enhanced Analog Performance S Garg, S Haldar, J Kaur, RS Gupta, A Goel 2023 IEEE Devices for Integrated Circuit (DevIC), 425-429, 2023 | 1 | 2023 |
Prof. (Dr.) Satvir Singh DeswalMaharaja Agrasen Institute of TechnologyVerified email at mait.ac.in
