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Dr. BISWAJIT JENA
Dr. BISWAJIT JENA
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Title
Cited by
Cited by
Year
Performance analysis of undoped cylindrical gate all around (GAA) MOSFET at subthreshold regime
SKM B Jena, KP Pradhan, S Dash, GP Mishra, PK Sahu
Advances in Natural Sciences: Nanoscience and Nanotechnology 6 (3), 035010, 2015
482015
Investigation on cylindrical gate all around (GAA) to nanowire MOSFET for circuit application
B Jena, KP Pradhan, PK Sahu, S Dash, GP Mishra, SK Mohapatra
Facta universitatis-series: Electronics and Energetics 28 (4), 637-643, 2015
362015
Improved switching speed of a CMOS inverter using work-function modulation engineering
B Jena, S Dash, GP Mishra
IEEE transactions on electron devices 65 (6), 2422-2429, 2018
332018
Inner-gate-engineered GAA MOSFET to enhance the electrostatic integrity
B Jena, S Dash, SR Routray, GP Mishra
Nano 14 (10), 1950128, 2019
302019
A new analytical drain current model of cylindrical gate silicon tunnel FET with source δ-doping
S Dash, B Jena, GP Mishra
Superlattices and Microstructures 97, 231-241, 2016
292016
A comprehensive investigation of vertically stacked silicon nanosheet field effect transistors: an analog/rf perspective
S Tayal, J Ajayan, LMIL Joseph, J Tarunkumar, D Nirmal, B Jena, A Nandi
Silicon 14 (7), 3543-3550, 2022
232022
Conical surrounding gate MOSFET: a possibility in gate-all-around family
SDGPM B Jena, B S Ramkrishna
Advances in Natural Sciences: Nanoscience and Nanotechnology 7 (1), 015009 …, 2016
232016
Silicon nanowire GAA-MOSFET: A workhorse in nanotechnology for future semiconductor devices
K Bhol, B Jena, U Nanda
Silicon 14 (7), 3163-3171, 2022
222022
Investigation of nanosheet-FET based logic gates at sub-7 nm technology node for digital IC applications
S Tayal, S Valasa, S Bhattacharya, J Ajayan, SM Ahmed, B Jena, ...
Silicon 14 (18), 12261-12267, 2022
202022
Electrostatic performance improvement of dual material cylindrical gate MOSFET using work-function modulation technique
B Jena, S Dash, GP Mishra
Superlattices and microstructures 97, 212-220, 2016
202016
Incorporating bottom-up approach into device/circuit co-design for SRAM-based cache memory applications
S Tayal, B Smaani, SB Rahi, AK Upadhyay, S Bhattacharya, J Ajayan, ...
IEEE Transactions on Electron Devices 69 (11), 6127-6132, 2022
192022
Performance analysis of ferroelectric gaa mosfet with metal grain work function variability
B Jena, K Bhol, U Nanda, S Tayal, SR Routray
Silicon 14 (6), 3005-3012, 2022
152022
Jestr r
P Keerthana, PP Babu, TA Babu, B Jena
Journal of Engineering Science and Technology Review 13 (2), 39-43, 2020
152020
Impact of source pocket doping on RF and linearity performance of a cylindrical gate tunnel FET
S Dash, AS Lenka, B Jena, GP Mishra
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2018
152018
Investigation of electrostatic performance for a conical surrounding gate MOSFET with linearly modulated work-function
BSRBJSDGP Mishra
Superlattices and Microstructures, 2016
112016
Ambipolarity suppression of a double gate tunnel FET using high-k drain dielectric pocket
S Panda, B Jena, S Dash
ECS Journal of Solid State Science and Technology 11 (1), 013014, 2022
102022
Journey of Mosfet from planar to gate all around: A review
K Bhol, B Jena, U Nanda
Recent Patents on Nanotechnology 16 (4), 326-332, 2022
92022
Impact of metal grain work function variability on ferroelectric insulation based GAA MOSFET
B Jena, S Dash, GP Mishra
Micro & Nano Letters 13 (10), 1378-1381, 2018
92018
Study on analog/RF and linearity performance of staggered heterojunction gate stack tunnel FET
SM Biswal, SK Das, S Misra, U Nanda, B Jena
ECS Journal of Solid State Science and Technology 10 (7), 073001, 2021
72021
Conventional vs. junctionless gate-stack DG-MOSFET based CMOS inverter
S Tayal, P Samrat, V Keerthi, B Jena, K Rajendra
International Journal of Nano Dimension 12 (2), 98-103, 2021
72021
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