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Dr.Sakthivel Ramachandran
Dr.Sakthivel Ramachandran
Associate Professor, VIT University, Vellore, India
Verified email at vit.ac.in
Title
Cited by
Cited by
Year
High-performance ECC processor architecture design for IoT security applications
T Kudithi, R Sakthivel
The Journal of Supercomputing 75 (1), 447-474, 2019
302019
VLSI Implementation of AES Crypto Processor for High Throughput
PP Sumanth Kumar Reddy S, R.Sakthivel
INTERNATIONAL JOURNAL OF ADVANCED ENGINEERING SCIENCES AND TECHNOLOGIES 6 (1 …, 2011
292011
Low power XOR gate design and its applications
K Ravali, NR Vijay, S Jaggavarapu, R Sakthivel
2017 Fourth International Conference on Signal Processing, Communication and …, 2017
252017
Ultra‐low‐voltage GDI‐based hybrid full adder design for area and energy‐efficient computing systems
K Sanapala, R Sakthivel
IET Circuits, Devices & Systems 13 (4), 465-470, 2019
242019
Schmitt trigger-based single-ended 7T SRAM cell for Internet of Things (IoT) applications
K Sanapala, SS Yeo
The Journal of Supercomputing 74, 4613-4622, 2018
162018
Design of artificial neuron network with synapse utilizing hybrid CMOS transistors with memristor for low power applications
VK Rai, R Sakthivel
Journal of Circuits, Systems and Computers 29 (12), 2050187, 2020
102020
Energy efficient low area error tolerant adder with higher accuracy
R Sakthivel, HM Kittur
Circuits, Systems, and Signal Processing 33, 2625-2641, 2014
102014
An optimized architecture to perform image compression and encryption simultaneously using modified DCT algorithm
SVV Sateesh, R Sakthivel, K Nirosha, HM Kittur
2011 international conference on signal processing, communication, computing …, 2011
102011
Highly secured high throughput VLSI architecture for AES algorithm
M Vanitha, R Sakthivel
2012 International Conference on Devices, Circuits and Systems (ICDCS), 403-407, 2012
92012
15–4 Approximate Compressor based multiplier for image processing
TUS Krishna, KS Riyas, Y Premson, R Sakthivel
2018 2nd International Conference on Trends in Electronics and Informatics …, 2018
82018
Analysis of GDI logic for minimum energy optimal supply voltage
K Sanapala, R Sakthivel
2017 International conference on Microelectronic Devices, Circuits and …, 2017
82017
Low power realization of subthreshold digital logic circuits using body bias technique
K Sanapala, R Sakthivel
Indian Journal of Science and Technology 9 (5), 1-5, 2016
62016
Efficient VCO using FinFET
S Saxena, M Srikanth, S Jawale, R Sakthivel
Indian Journal of Science and Technology 8 (S2), 262-270, 2015
52015
Low power high throughput reconfigurable stream cipher hardware VLSI architectures
R Sakthivel, M Vanitha, HM Kittur
International Journal of Information and Computer Security 6 (1), 1-11, 2014
52014
An efficient hardware architecture based on an ensemble of deep learning models for COVID-19 prediction
R Sakthivel, IS Thaseen, M Vanitha, M Deepa, M Angulakshmi, ...
Sustainable Cities and Society 80, 103713, 2022
42022
Low power area optimized and high speed carry select adder using optimized half sum and carry generation unit for FIR filter
R Sakthivel, G Ragunath
Journal of Ambient Intelligence and Humanized Computing 12, 5513-5524, 2021
42021
High performance GCM architecture for the security of high speed network
V Mohanraj, R Sakthivel, A Paul, S Rho
International Journal of Parallel Programming 46, 904-922, 2018
42018
A custom reconfigurable power efficient FIR filter
R Sakthivel, I Mishra, V Jalke, A Wachaspati
2016 International Conference on Circuit, Power and Computing Technologies …, 2016
42016
Low power energy efficient pipelined multiply-accumulate architecture
R Sakthivel, K Sravanthi, HM Kittur
Proceedings of the International Conference on Advances in Computing …, 2012
42012
Superior implementation of accelerated QR decomposition for ultrasound imaging
SG Sreejeesh, R Sakthivel, JU Kidav
IEEE Access 8, 156244-156260, 2020
32020
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