Junctionless tunnel FET for high-temperature applications from an analog design perspective S Routh, D Deb, RK Baruah, R Goswami 2022 IEEE International Conference on Nanoelectronics, Nanophotonics …, 2022 | 2 | 2022 |
Impact of High-temperature and Interface Traps on Performance of a Junctionless Tunnel FET S Routh, D Deb, RK Baruah, R Goswami Silicon, 12, 2022 | 1 | 2022 |
A Scalable, Enhancement mode Junctionless SiC FET with Embedded P+ Pockets in the Oxide Layer for High-Temperature Applications RK Baruah, B Mahajan, S Routh Journal of Electronic Materials, 2022 | 1 | 2022 |
A comprehensive analysis of LDMOS transistors for analog applications under γ-radiation S Routh, RK Baruah Microelectronics Reliability 148, 115159, 2023 | | 2023 |
Modelling of Surface Potential and Threshold Voltage for Short Channel Junctionless Cylindrical Gate-All-Around MOSFET S Khatonir, S Routh, RK Baruah IEEE EDKCON, KOLKATA, 1-5, 2022 | | 2022 |