Fault Tolerant System for Embedded System Architecture N Arya, AP Singh International Journal of Engineering and Technology 9 (3S), 93-97, 2017 | 7 | 2017 |
A study relation between energy spectral density and probability density function with impulse response first order control system A Kumar, N Arya 2017 International conference of electronics, communication and aerospace …, 2017 | 7 | 2017 |
An intelligent bin management system design for smart city using GSM technology B Prasad, S Dalmia, S Dasari, N Arya 2018 7th International Conference on Reliability, Infocom Technologies and …, 2018 | 6 | 2018 |
A fault avoidance approach with test set generation in combinational circuits using genetic algorithm N Arya, AP Singh 2018 2nd International Conference on Inventive Systems and Control (ICISC …, 2018 | 5 | 2018 |
A Lightweight and Efficient Scheme for e-Health Care System using Blockchain Technology S Saxena, N Arya, SK Bharti, V Dwivedi 2023 6th International Conference on Information Systems and Computer …, 2023 | 3 | 2023 |
A Comprehensive Testing Technique for Embedded System PCBA MN Khan, N Arya, AP Singh Indian Journal of Science and Technology, 2017 | 2 | 2017 |
Digital Watermarking Using 2-DCT T Singh, N Arya International Journal of Engineering and Technology (IJET) 9 (3S), 21-25, 2017 | 2 | 2017 |
Fault tolerant design of digital systems N Arya, AP Singh IET Digital Library, 2016 | 2 | 2016 |
Design amplitude modulation using frequency analysis second order control system A Kumar, N Arya 2017 International conference of electronics, communication and aerospace …, 2017 | 1 | 2017 |
Comparative analysis of time and physical redundancy techniques for fault detection N Arya, AP Singh Indonesian Journal of Electrical Engineering and Computer Science 6 (1), 66-71, 2017 | 1 | 2017 |
IEEE 1149.1 test acess port (JTAG) verification using verilog simulation N Arya, AP Singh 2016 International Conference on Electrical, Electronics, and Optimization …, 2016 | 1 | 2016 |
Covid-19: an urge for telemedicine V Singh, N Arya, S Singh International Journal of Current Advanced Research 9 (10 (A)), 23166-23168, 2020 | | 2020 |
Fault Detection probability evaluation approach in combinational circuits using test set generation method N Arya, AP Singh Preprints, 2018 | | 2018 |
IEEE 1149.1 Test Access Port (JTAG) Verification using Verilog Simulation N Arya National Institute of Technology, Kurukshetra, 2018 | | 2018 |
Defect and fault detection in combinational circuits: Techniques and analysis N Arya, AP Singh 2017 International Conference on Advances in Computing, Communications and …, 2017 | | 2017 |
Defence Mechanism Of Oral Cavity–Mini Review N Arya, R Bansal, N Anand, S Saxena | | |