| Digital fractional‐order differentiator and integrator models based on first‐order and higher order operators M Gupta, P Varshney, GS Visweswaran International Journal of Circuit Theory and Applications 39 (5), 461-474, 2011 | 67 | 2011 |
| SRAM cell and cell layout method A Grover, GS Visweswaran US Patent 9,305,633, 2016 | 62 | 2016 |
| New Approach to Realize Fractional Power in-Domain at Low Frequency GS Visweswaran, P Varshney, M Gupta IEEE Transactions on Circuits and Systems II: Express Briefs 58 (3), 179-183, 2011 | 35 | 2011 |
| New switched capacitor fractional order integrator P Varshney, M Gupta, GS Visweswaran Journal of Active and Passive Electronic Devices 2 (3), 187-197, 2007 | 30 | 2007 |
| An equalizer with controllable transfer function for 6-Gb/s HDMI and 5.4-Gb/s DisplayPort receivers in 28-nm UTBB-FDSOI PS Sahni, SC Joshi, N Gupta, GS Visweswaran IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (8 …, 2016 | 26 | 2016 |
| Battery aware dynamic scheduling for periodic task graphs V Rao, N Navet, G Singhal, A Kumar, GS Visweswaran Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006 | 26 | 2006 |
| Low voltage write time enhanced SRAM cell and circuit extensions A Grover, GS Visweswaran US Patent 8,654,570, 2014 | 24 | 2014 |
| A 32 kb 0.35–1.2 V, 50 MHz–2.5 GHz bit-interleaved SRAM with 8 T SRAM cell and data dependent write assist in 28-nm UTBB-FDSOI CMOS A Grover, GS Visweswaran, CR Parthasarathy, M Daud, D Turgis, ... IEEE Transactions on Circuits and Systems I: Regular Papers 64 (9), 2438-2447, 2017 | 19 | 2017 |
| Regulator with improved load regulation PS Sahni, GS Visweswaran US Patent 7,893,671, 2011 | 16 | 2011 |
| Texture Filter Memory—a power-efficient and scalable texture memory architecture for mobile graphics processors BVN Silpa, A Patney, T Krishna, PR Panda, GS Visweswaran 2008 IEEE/ACM International Conference on Computer-Aided Design, 559-564, 2008 | 16 | 2008 |
| Implementation of switched capacitor fractional order differentiator (PDδ) circuit P Varshney, M Gupta, GS Visweswaran International Journal of Electronics 95 (6), 531-547, 2008 | 15 | 2008 |
| Memory with an assist determination controller and associated methods A Grover, GS Visweswaran US Patent 8,982,651, 2015 | 13 | 2015 |
| Switched capacitor realizations of fractional-order differentiators and integrators based on an operator with improved performance P Varshney, M Gupta, GS Visweswaran Radioengineering 20 (1), 340-348, 2011 | 13 | 2011 |
| Data-dependent pullup transistor supply and body bias voltage application for a static random access memory (SRAM) cell A Grover, GS Visweswaran US Patent 8,724,374, 2014 | 12 | 2014 |
| Novel digital differentiator and corresponding fractional order differentiator models M Gupta, P Varshney, GS Visweswaran, B Kumar International Conference on Security and Cryptography 2, 47-54, 2008 | 12 | 2008 |
| Inclusion of thermal effects in the simulation of bipolar circuits using circuit level behavioral modeling TS Shelar, GS Visweswaran 17th International Conference on VLSI Design. Proceedings., 821-826, 2004 | 11 | 2004 |
| First and higher order operator based fractional order differentiator and integrator models P Varshney, M Gupta, GS Visweswaran TENCON 2009-2009 IEEE Region 10 Conference, 1-6, 2009 | 10 | 2009 |
| A 0.5 V VMIN 6T SRAM in 28nm UTBB FDSOI technology using compensated WLUD scheme with zero performance loss A Kumar, GS Visweswaran, V Kumar, K Saha 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 7 | 2016 |
| Low Standby Power Capacitively Coupled Sense Amplifier for wide voltage range operation of dual rail SRAMs A Grover, P Kumar, M Daud, GS Visweswaran, C Parthasarathy, JP Noel, ... 2015 International Conference on IC Design & Technology (ICICDT), 1-4, 2015 | 7 | 2015 |
| A low-power ternary content addressable memory (TCAM) with segmented and non-segmented matchlines M Sultan, M Siddiqui, GS Visweswaran TENCON 2008-2008 IEEE Region 10 Conference, 1-5, 2008 | 7 | 2008 |
