Phase Frequency Detector and Charge Pump for DPLL Using 0.18µm CMOS Technology ND Patel International Journal of Emerging Technology and Advanced Engineering …, 2013 | 17 | 2013 |
Charge Pump, Loop Filter and VCO for Phase Lock Loop Using 0.18μm CMOS Technology ND Patel IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) 2 (4), 2013 | 12 | 2013 |
Analysis of CMOS Second Generation Current Conveyors ND Patel International Journal of Engineering Research & Technology (IJERT) 3 (2), 2014 | 4 | 2014 |
Characterization of High Speed Voltage Controlled Oscillator Circuits using 90nm CMOS Technology ND Patel International Journal of VLSI Design 7 (1), 2016 | 2 | 2016 |
The characteristic and behavioral performance of CMOS Charge Pump Circuits for Phase Locked Loop Nilesh D. Patel, Amisha P. Naik The International journal of analytical and experimental modal analysis …, 2020 | | 2020 |
A Low Jitter – Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer CMOS Technology PPG Nilesh D. Patel, Amisha P. Naik International Journal of Recent Technology and Engineering (IJRTE) 8 (4 …, 2019 | | 2019 |
A Low Jitter – Low Phase Noise Wideband Digital Phase Locked Loop in Nanometer CMOS Technology Nilesh D. Patel International Journal of Electronics and Communication Engineering and …, 2018 | | 2018 |
Comparative Analysis of Phase Frequency Detector for Phase-Locked Loops ND Patel Journal of VLSI Design Tools and Technology, 2017 | | 2017 |
A Low Power Single Phase Dual Modulus Prescaler ND Patel International Journal of Advance Engineering and Research Development …, 2015 | | 2015 |
Simulation and Analysis of First & Second Generation of Current conveyor using 90 nm CMOS Technology ND Patel International Journal of Advance Engineering and Research Development …, 2015 | | 2015 |
High Speed Voltage Follower using DTMOS Transistor International Journal of Advance Engineering and Research Development …, 2015 | | 2015 |
Characterization and Simulation of Self Cascode CMOS Current Mirror using 0.18 um Technology ND Patel International Journal of Advance Engineering and Research Development …, 2015 | | 2015 |
Characterization of High Speed Phase Frequency Detector circuit ND Patel Journal of VLSI Design Tools & Technology 5 (1), 2015 | | 2015 |
An Approach to choose Systems Engineering using Research Methodology ND Patel International Journal of Modern Trends in Engineering & Research (IJMTER) 2 (3), 2015 | | 2015 |
0.18um CMOS Current Feedback Amplifier using Negative Current Conveyer International Journal of Advance Engineering and Research Development …, 2014 | | 2014 |
Wide-Band Single Stage Source Coupled CMOS Voltage Controlled Oscillator (VCO) using 0.18 μm CMOS Technology ND Patel International Journal of Engineering Science & Research Technology 3 (2), 2014 | | 2014 |
Low Power and Low Dead Zone Phase Frequency Detector in PLL ND Patel International Journal of Engineering Science & Research Technology 3 (3), 2014 | | 2014 |
High Speed CMOS Charge Pump Circuit for PLL Applications Using 180nm CMOS Technology ND Patel International Journal of Advance Engineering and Research Development 1 (5), 2014 | | 2014 |
Design and Simulation of Telescopic OTA using 0.18μm, 0.25μm and 0.35μm CMOS Technology ND Patel International Journal of Emerging Trends & Technology in Computer Science …, 2013 | | 2013 |
Design and Simulation of Two stage OTA using .18um & .35um Technology ND Patel International Journal of Emerging Trends & Technology in Computer Science …, 2013 | | 2013 |