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Divjyot Sethi
Title
Cited by
Cited by
Year
Abstractions for model checking SDN controllers
D Sethi, S Narayana, S Malik
2013 Formal Methods in Computer-Aided Design, 145-148, 2013
582013
SAT-based techniques for determining backbones for post-silicon fault localisation
CS Zhu, G Weissenbacher, D Sethi, S Malik
2011 IEEE International High Level Design Validation and Test Workshop, 84-91, 2011
392011
Handling controller and node failure scenarios during data collection
C Nagarajan, D Sethi, RR Kompella
US Patent 10,574,513, 2020
252020
Topology explorer
D Sethi, C Nagarajan, RR Kompella, G Gupta, S Iyer
US Patent 10,498,608, 2019
202019
Assurance of quality-of-service configurations in a network
C Nagarajan, K Mohanram, RR Kompella, D Sethi, S Iyer
US Patent 10,826,788, 2020
102020
Specification and synthesis of hardware checkpointing and rollback mechanisms
C Chan, D Schwartz-Narbonne, D Sethi, S Malik
Proceedings of the 49th Annual Design Automation Conference, 1226-1232, 2012
82012
Model checking unbounded concurrent lists
D Sethi, M Talupur, S Malik
International Journal on Software Tools for Technology Transfer 18, 375-391, 2016
62016
Collecting network models and node information from a network
C Nagarajan, D Sethi, RR Kompella
US Patent 10,686,669, 2020
52020
Using flow specifications of parameterized cache coherence protocols for verifying deadlock freedom
D Sethi, M Talupur, S Malik
Automated Technology for Verification and Analysis: 12th International …, 2014
52014
Parameterized model checking of fine grained concurrency
D Sethi, M Talupur, D Schwartz-Narbonne, S Malik
Model Checking Software: 19th International Workshop, SPIN 2012, Oxford, UK …, 2012
52012
Check-pointing ACI network state and re-execution from a check-pointed state
D Sethi, C Nagarajan, A Dixit, JT Monk, GC Ng, RR Kompella, S Iyer
US Patent 10,873,509, 2020
42020
Synthesis of models for networks using automated boolean learning
D Sethi, C Nagarajan
US Patent 10,826,770, 2020
32020
Specification and encoding of transaction interaction properties
D Sethi, Y Mahajan, S Malik
Formal Methods in System Design 39, 144-164, 2011
12011
Topology explorer
D Sethi, C Nagarajan, RR Kompella, G Gupta, S Iyer
US Patent 11,463,316, 2022
2022
Address translation for external network appliance
V Balamurugan, C Nagarajan, D Sethi, C Velpula, V Manvesh, ...
US Patent App. 17/306,816, 2021
2021
Address translation for external network appliance
V Balamurugan, C Nagarajan, D Sethi, C Velpula, V Manvesh, ...
US Patent 11,019,027, 2021
2021
Check-pointing aci network state and re-execution from a check-pointed state
D Sethi, C Nagarajan, A Dixit, JT Monk, GC Ng, RR Kompella, S Iyer
US Patent App. 17/112,854, 2021
2021
Epoch comparison for network policy differences
C Nagarajan, D Sethi, S Harneja, DH Jain, CJ Lo
US Patent App. 16/225,831, 2020
2020
Scaling Verification by Leveraging Parametrization
D Sethi
Princeton University, 2014
2014
Specification and Encoding of Transaction Interaction Properties in Transaction-Based Models
D Sethi, S Malik
Poster, GSRC Annual Symposium 3, 2009
2009
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