| Investigation of a Ge-source vertical TFET with delta-doped layer K Vanlalawpuia, B Bhowmick IEEE Transactions on Electron Devices 66 (10), 4439-4445, 2019 | 76 | 2019 |
| Analysis of hetero-stacked source TFET and heterostructure vertical TFET as dielectrically modulated label-free biosensors K Vanlalawmpuia, B Bhowmick IEEE Sensors Journal 22 (1), 939-947, 2021 | 33 | 2021 |
| Deep insight into DC, RF/analog, and digital inverter performance due to variation in straggle parameter for gate modulated TFET R Saha, K Vanlalawmpuia, B Bhowmick, S Baishya Materials Science in Semiconductor Processing 91, 102-107, 2019 | 24 | 2019 |
| Linearity performance analysis due to lateral straggle variation in hetero-stacked TFET K Vanlalawmpuia, B Bhowmick Silicon 12 (4), 955-961, 2020 | 21 | 2020 |
| Optimization of a hetero-structure vertical tunnel FET for enhanced electrical performance and effects of temperature variation on RF/linearity parameters K Vanlalawmpuia, B Bhowmick Silicon 13 (1), 155-166, 2021 | 18 | 2021 |
| Investigation of interface trap charges and temperature variation in heterostacked-TFET K Vanlalawmpuia, B Bhowmick Indian Journal of Physics 95 (9), 1697-1708, 2021 | 17 | 2021 |
| Performance evaluation of hetero-stacked TFET for variation in lateral straggle and its application as digital inverter K Vanlalawmpuia, R Saha, B Bhowmick Applied Physics A 124 (10), 701, 2018 | 16 | 2018 |
| Analysis of temperature dependent effects on DC, analog/RF and linearity parameters for a delta doped heterojunction vertical tunnel FET K Vanlalawmpuia, B Bhowmick Silicon 14 (13), 7517-7529, 2022 | 6 | 2022 |
| Study on induced work-function variation of titanium metal gate on various electrical parameters for delta-doped layer germanium source vertical tunnel FET K Vanlalawmpuia, B Bhowmick Journal of Computational Electronics 20 (3), 1137-1146, 2021 | 6 | 2021 |
| An analytical drain current model of Germanium source vertical tunnel field effect transistor K Vanlalawmpuia, SK Mitra, B Bhowmick Micro and Nanostructures 165, 207197, 2022 | 4 | 2022 |
| Optimization of electrical parameters in SiGe channel nMOSFET K Vanlalawmpuia, B Bhowmick, M Choudhury 2017 Devices for Integrated Circuit (DevIC), 231-235, 2017 | 4 | 2017 |
| Analysis of negative differential resistance and RF/Analog performance on drain engineered negative capacitance dual stacked-source tunnel FET K Vanlalawmpuia, AS Medury IEEE Transactions on Electron Devices 70 (3), 1417-1424, 2023 | 2 | 2023 |
| Interfacial charge analysis and temperature sensitivity of germanium source vertical tunnel FET with delta-doped layer K Vanlalawmpuia, B Bhowmick Microelectronics Reliability 131, 114512, 2022 | 2 | 2022 |
| Study of effect of oxide thickness variation on electrical parameters and high frequency characteristics induced by work-function variation for delta-doped germanium-source … K Vanlalawmpuia, R Saha, B Bhowmick Semiconductor Science and Technology 35 (10), 105009, 2020 | 2 | 2020 |
| Performance assessment of dielectrically modulated negative capacitance germanium source vertical tunnel FET biosensor for detection of breast cancer cell lines K Vanlalawmpuia, P Ghosh AEU-International Journal of Electronics and Communications 171, 154902, 2023 | 1 | 2023 |
| Engineering negative differential resistance in negative capacitance Quad-FinFET K Vanlalawmpuia, AS Medury Materials Science and Engineering: B 297, 116725, 2023 | 1 | 2023 |
| Design Implementation and RF Analysis of Vertical L-Pattern Gate TFET on SELBOX Substrate P Ghosh, K Vanlalawmpuia Transactions on Electrical and Electronic Materials, 1-7, 2024 | | 2024 |
| Insights into the impact of random dopant fluctuation on ferroelectric germanium source vertical TFET K Vanlalawmpuia, P Ghosh, B Bhowmick Materials Science and Engineering: B 299, 116994, 2024 | | 2024 |
| Comparative analysis of ferroelectric quad-FinFET with and without Si3N4 spacer on analog/RF, linearity performance and digital inverter application with … K Vanlalawmpuia, AS Medury Ferroelectrics 613 (1), 64-78, 2023 | | 2023 |
| Lateral Straggle Parameter and Its Impact on Hetero-Stacked Source Tunnel FET K Vanlalawmpuia, B Bhowmick Contemporary Trends in Semiconductor Devices: Theory, Experiment and …, 2022 | | 2022 |
