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JoAnn M. Paul
JoAnn M. Paul
Associate Professor of Electrical and Computer Engineering, Virginia Tech
Verified email at vt.edu
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Cited by
Cited by
Year
Undergraduate embedded system education at Carnegie Mellon
P Koopman, H Choset, R Gandhi, B Krogh, D Marculescu, P Narasimhan, ...
ACM Transactions on Embedded Computing Systems (TECS) 4 (3), 500-528, 2005
1132005
What's in a Name
JAM Paul
IEEE Computer 39 (3), 87-89, 2006
97*2006
High level cache simulation for heterogeneous multiprocessors
JJ Pieper, A Mellan, JAM Paul, DE Thomas, F Karim
Proceedings of the 41st annual Design Automation Conference, 287-292, 2004
662004
Scenario-Oriented Design for Single Chip Heterogeneous Multiprocessors
JAM Paul
Next Generation Software Workshop, IPDPS, 2005
652005
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors
JM Paul, DE Thomas, AS Cassidy
ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (3 …, 2005
542005
Power-performance simulation and design strategies for single-chip heterogeneous multiprocessors
BH Meyer, JJ Pieper, JM Paul, JE Nelson, SM Pieper, AG Rowe
IEEE transactions on Computers 54 (6), 684-697, 2005
522005
Amdahl’s law revisited for single chip systems
JAM Paul, BH Meyer
International Journal of Parallel Programming 35, 101-123, 2007
492007
Modeling shared resource contention using a hybrid simulation/analytical approach
A Bobrek, JJ Pieper, JE Nelson, JAM Paul, DE Thomas
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
492004
A new era of performance evaluation
SM Pieper, JAM Paul, MJ Schulte
Computer 40 (9), 23-30, 2007
432007
Layered, multi-threaded, high-level performance design
AS Cassidy, JAM Paul, DE Thomas
2003 Design, Automation and Test in Europe Conference and Exhibition, 954-959, 2003
422003
Schedulers as model-based design elements in programmable heterogeneous multiprocessors
JAM Paul, A Bobrek, JE Nelson, JJ Pieper, DE Thomas
Proceedings of the 40th annual Design Automation Conference, 408-411, 2003
332003
A layered, codesign virtual machine approach to modeling computer systems
JM Paul, DE Thomas
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
272002
Programmers' views of SoCs
JAM Paul
Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware …, 2003
252003
Stochastic contention level simulation for single-chip heterogeneous multiprocessors
A Bobrek, JAM Paul, DE Thomas
IEEE Transactions on Computers 59 (10), 1402-1418, 2010
202010
Shared resource access attributes for high-level contention models
A Bobrek, JAM Paul, DE Thomas
Proceedings of the 44th annual Design Automation Conference, 720-725, 2007
172007
Benchmark-based design strategies for single chip heterogeneous multiprocessors
JAM Paul, DE Thomas, A Bobrek
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware …, 2004
162004
Models of Computation for Systems-on-Chips
JM Paul, DE Thomas
Multiprocessor Systems-on-Chips, 2004
122004
Interrupt modeling for efficient high-level scheduler design space exploration
FR Johnson, JM Paul
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (1 …, 2008
102008
Modeling and simulation of steady state and transient behaviors for emergent SoCs
JAM Paul, AJ Suppé, DE Thomas
Proceedings of the 14th international symposium on Systems synthesis, 262-267, 2001
102001
Modeling and evaluation of hardware/software designs
NK Tibrewala, JAM Paul, DE Thomas
Proceedings of the ninth international symposium on Hardware/software …, 2001
102001
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