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Atanu Kundu
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Cited by
Year
Technology computer aided design
C Sarkar
CRC Press, 2018
492018
Influence of Underlap on Gate Stack DG-MOSFET for analytical study of Analog/RF performance
A Kundu, A Dasgupta, R Das, S Chakraborty, A Dutta, CK Sarkar
Superlattices and Microstructures 94, 60-73, 2016
382016
Handbook for III-V high electron mobility transistor technologies
D Nirmal, J Ajayan
CRC Press, 2019
362019
Nanotechnology: synthesis to applications
S Roy, CK Ghosh, CK Sarkar
CRC Press, 2017
342017
Subthreshold analog/RF performance of underlap DG FETs with asymmetric source/drain extensions
K Koley, B Syamal, A Kundu, N Mohankumar, CK Sarkar
Microelectronics Reliability 52 (11), 2572-2578, 2012
332012
Comparative Study of Variations in Gate Oxide Material of a Novel Underlap DG MOS-HEMT for Analog/RF and High Power Applications
A Mondal, A Roy, R Mitra, A Kundu
Silicon, 1-7, 2019
272019
Impact of gate metal work-function engineering for enhancement of subthreshold analog/RF performance of underlap dual material gate DG-FET
A Kundu, K Koley, A Dutta, CK Sarkar
Microelectronics Reliability 54 (12), 2717-2722, 2014
262014
Analytical modeling of label free biosensor using charge plasma based gate underlap dielectric modulated MOSFET
CKS Manash Chanda, Rahul Das, Atanu Kundu
Superlattices and Microstructures 104, 451-460, 2017
252017
Influence of channel thickness on analog and RF performance enhancement of an underlap DG AlGaN/GaN based MOS-HEMT device
A Roy, R Mitra, A Kundu
2019 Devices for Integrated Circuit (DevIC), 186-190, 2019
152019
Analysis of high-k spacer on symmetric underlap DG-MOSFET with Gate Stack architecture
R Das, S Chakraborty, A Dasgupta, A Dutta, A Kundu, CK Sarkar
Superlattices and Microstructures 97, 386-396, 2016
142016
Comparisons between dual and tri material gate on a 32 nm double gate MOSFET
A Dasgupta, R Das, S Chakraborty, A Dutta, A Kundu, CK Sarkar
Nano 11 (10), 1650117, 2016
112016
Two-dimensional modeling of the underlap graded-channel FinFET
A Chattopadhyay, A Kundu, CK Sarkar, C Bose
Journal of Computational Electronics 19, 688-699, 2020
82020
Impact of lateral straggle on the analog/RF performance of asymmetric gate stack double gate MOSFET
GS Sivaram, S Chakraborty, R Das, A Dasgupta, A Kundu, CK Sarkar
Superlattices and Microstructures 97, 477-488, 2016
82016
RF parameter extraction of Bulk FinFET: A non quasi static approach
A Kundu, B Syamal, K Koley, CK Sarkar, N Mohankumar
2010 IEEE International Conference of Electron Devices and Solid-State …, 2010
82010
Analog/RF and power performance analysis of an underlap DG AlGaN/GaN based high-k dielectric MOS-HEMT
A Roy, R Mitra, A Mondal, A Kundu
Silicon 14 (5), 2211-2218, 2022
62022
Memoryless nonlinearity in IT JL FinFET with spacer technology: Investigation towards reliability
B Vandana, SK Mohapatra, JK Das, KP Pradhan, A Kundu, BK Kaushik
Microelectronics Reliability 119, 114072, 2021
62021
A comparative analysis of analog performances of underlapped dual gate AlGaN/GaN based MOS-HEMT and Schottky-HEMT
H Mukherjee, R Dasgupta, M Kar, A Kundu
2020 IEEE Calcutta Conference (CALCON), 412-416, 2020
62020
A linearity based comparison between symmetric and asymmetric lateral diffusion for a 22 nm Underlapped DG-MOSFET
A Chattopadhyay, R Das, A Dasgupta, A Kundu, CK Sarkar
Superlattices and Microstructures 107, 69-82, 2017
62017
An optimisation based study of underlap architecture of sub 16 nm double gate MOSFET for enhanced analog performance
R Das, P Pandit, S Chakraborty, A Dasgupta, A Kundu, CK Sarkar
Materials Focus 6 (3), 305-309, 2017
62017
Influence on the analog/RF performance in graded channel Gate Stack DG-MOSFETs
A Chattopadhyay, A Dutta, A Kundu, CK Sarkar
2016 3rd International Conference on Devices, Circuits and Systems (ICDCS …, 2016
62016
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