Ulya R. Karpuzcu
Ulya R. Karpuzcu
Associate Professor of Electrical and Computer Engineering, University of Minnesota, Twin-Cities
Verified email at umn.edu - Homepage
Cited by
Cited by
Accurate microarchitecture-level fault modeling for studying hardware faults
ML Li, P Ramachandran, UR Karpuzcu, SKS Hari, SV Adve
IEEE International Symposium on High Performance Computer Architecture (HPCA), 2009
Blueshift: Designing processors for timing speculation from the ground up.
B Greskamp, L Wan, UR Karpuzcu, JJ Cook, J Torrellas, D Chen, C Zilles
IEEE International Symposium on High Performance Computer Architecture (HPCA …, 2009
The BubbleWrap many-core: popping cores for sequential acceleration
UR Karpuzcu, B Greskamp, J Torrellas
IEEE/ACM International Symposium on Microarchitecture (MICRO), 2009
VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages
UR Karpuzcu, KB Kolluru, NS Kim, J Torrellas
IEEE/IFIP International Conference on Dependable Systems and Networks (DSN …, 2012
EnergySmart: Toward Energy-Efficient Manycores for Near-Threshold Computing
UR Karpuzcu, A Sinkar, NS Kim, J Torrellas
IEEE International Symposium on High Performance Computer Architecture (HPCA …, 2013
Coping with Parametric Variation at Near-Threshold Voltages
U Karpuzcu, N Kim, J Torrellas
IEEE Micro 33 (4), 6-14, 2013
Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors
AA Sinkar, HR Ghasemi, MJ Schulte, UR Karpuzcu, NS Kim
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (4), 747-758, 2014
On quantification of accuracy loss in approximate computing
I Akturk, K Khatamifard, UR Karpuzcu
Workshop on Duplicating, Deconstructing and Debunking (WDDD), 2015
Efficient in-memory processing using spintronics
Z Chowdhury, JD Harms, SK Khatamifard, M Zabihi, Y Lv, AP Lyle, ...
IEEE Computer Architecture Letters 17 (1), 42-46, 2017
Accordion: Toward Soft Near-Threshold Voltage Computing
UR Karpuzcu, I Akturk, NS Kim
IEEE International Symposium on High Performance Computer Architecture (HPCA …, 0
In-memory processing on the spintronic CRAM: From hardware design to application mapping
M Zabihi, ZI Chowdhury, Z Zhao, UR Karpuzcu, JP Wang, SS Sapatnekar
IEEE Transactions on Computers 68 (8), 1159-1173, 2018
Approximate communication: Techniques for reducing communication bottlenecks in large-scale parallel systems
F Betzel, K Khatamifard, H Suresh, DJ Lilja, J Sartori, U Karpuzcu
ACM Computing Surveys (CSUR) 51 (1), 1-32, 2018
ThermoGater: Thermally-aware on-chip voltage regulation
SK Khatamifard, L Wang, W Yu, S Köse, UR Karpuzcu
2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture …, 2017
Mitigation of NBTI induced performance degradation in on-chip digital LDOs
L Wang, SK Khatamifard, UR Karpuzcu, S Köse
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 803-808, 2018
Efficiency, stability, and reliability implications of unbalanced current sharing among distributed on-chip voltage regulators
L Wang, SK Khatamifard, OA Uzun, UR Karpuzcu, S Köse
IEEE Transactions on very large scale integration (VLSI) systems 25 (11 …, 2017
POWERT channels: A novel class of covert communicationexploiting power management vulnerabilities
SK Khatamifard, L Wang, A Das, S Kose, UR Karpuzcu
2019 IEEE International Symposium on High Performance Computer Architecture …, 2019
VARIUS-TC: A Modular Architecture-Level Model of Parametric Variation for Thin-Channel Switches
SK Khatamifard, M Resch, NS Kim, UR Karpuzcu
IEEE International Conference on Computer Design (ICCD), 2016
Quantum computing: an overview across the system stack
S Resch, UR Karpuzcu
arXiv preprint arXiv:1905.07240, 2019
AMNESIAC: Amnesic Automatic Computer
I Akturk, UR Karpuzcu
ACM International Conference on Architectural Support for Programming …, 2017
Automatic verilog code generation through grammatical evolution
UR Karpuzcu
Proceedings of the Annual Undergraduate Workshop on Genetic and Evolutionary …, 2005
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