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Dr. Vandana Dubey
Dr. Vandana Dubey
Sagar Institute of Research & Technology, Bhopal, M. P., India.
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Title
Cited by
Cited by
Year
Cloud computing in mobile applications
D Sahu, S Sharma, V Dubey, A Tripathi
International Journal of Scientific and Research Publications 2 (8), 1-9, 2012
422012
Merging of Data Flow Diagram with Unified Modeling
K Tiwari, A Tripathi, S Sharma, V Dubey
International Journal of Scientific and Research Publications, 403, 2012
262012
Comparative analysis of reactive and proactive protocol of mobile ad-hoc network
PK Bhardwaj, S Sharma, V Dubey
International Journal on Computer Science and Engineering 4 (7), 1281, 2012
232012
Design of a 4-bit 2’s Complement Reversible Circuit for Arithmetic Logic Unit Applications
V Shukla, OP Singh, GR Mishra, RK Tiwari
The International Conference on Communication, Computing and Information …, 2012
222012
Reversible Realization of N-bit Arithmetic Circuit for Low Power Loss ALU Applications
V Shukla, OP Singh, GR Mishra, RK Tiwari
Procedia Computer Science 125, 847-854, 2018
172018
Novel design of a 4: 1 multiplexer circuit using reversible logic
V Shukla, OP Singh, GR Mishra, RK Tiwari
International Journal of Computational Engineering Research 3 (10), 2013
162013
A novel approach to design decimal to BCD encoder with reversible logic
V Shukla, OP Singh, GR Mishra, RK Tiwari
Power, Control and Embedded Systems (ICPCES), 2014 International Conference …, 2014
152014
Design of array multiplier circuit using reversible logic approach with optimized performance parameters
V Shukla, OP Singh, GR Mishra, RK Tiwari
Smart Healthcare for Disease Diagnosis and Prevention, 115, 2020
82020
A Novel Approach for Reversible Realization of 4× 4 Bit Vedic Multiplier Circuit
V Shukla, OP Singh, GR Mishra, RK Tiwari
Advances in VLSI, Communication, and Signal Processing, 733-745, 2020
82020
Roaming Honeypots along with IDS in Mobile Ad-Hoc Networks
S Shamsh, V Dubey
International Journal of Computer Applications 69 (23), 2013
72013
Design and Implementation of a Two-Bit Binary Comparator Using Reversible Logic
V Dubey, OP Singh, GR Mishra
International Journal of Scientific and Research Publications 2 (7), 1-4, 2012
72012
A novel approach to design a redundant binary signed digit adder cell using reversible logic gates
V Shukla, OP Singh, GR Mishra, RK Tiwari
Electrical Computer and Electronics (UPCON), 2015 IEEE UP Section Conference …, 2015
62015
Application of CSMT gate for efficient reversible realization of binary to gray code converter circuit
V Shukla, OP Singh, GR Mishra, RK Tiwari
Electrical Computer and Electronics (UPCON), 2015 IEEE UP Section Conference …, 2015
62015
An Optimized Circuit of 8: 1 Multiplexer Circuit using Reversible Logic Gates
V Shukla, OP Singh, GR Mishra, RK Tiwari
International Journal of Computer Applications 975, 8887, 2014
52014
Delivering Green Supply Chain Using Blockchain Technology for Sustainable Environment: A Survey
A Srivastava, V Dubey, B Hazela
Emerging Technologies in Data Mining and Information Security, 759-768, 2021
42021
A Novel Approach for Reversible Realization of 3: 8 Decoder Circuit with Optimized Performance Parameters
V Shukla, OP Singh, GR Mishra
2018 International Conference on Computational and Characterization …, 2018
42018
Performance parameters optimization and implementation of adder/subtractor circuit using reversible logic approach
V Shukla, OP Singh, GR Mishra, RK Tiwari
Industrial and Information Systems (ICIIS), 2016 11th International …, 2016
42016
Performance Analysis of DSR and AODV in Manets: Using WLAN Parameters
D Singh, V Dubey, S Sharma
International Journal of Computer Applications 47 (3), 1-6, 2012
42012
Nitty-Gritty of Deep Reinforcement Learning for the Healthcare Sector
V Kumari, V Dubey, P Kumari, R Pal, S Shrivastava, PTN Anh
AI and IoT-Based Technologies for Precision Medicine, 263-279, 2023
32023
A novel approach for reversible realization of 8-bit adder-subtractor circuit with optimized quantum cost
V Shukla, OP Singh, GR Mishra, RK Tiwari
Emerging Trends in Engineering, Technology and Science (ICETETS …, 2016
32016
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