Daniel Chaver
Daniel Chaver
Verified email at ucm.es
Title
Cited by
Cited by
Year
Branch prediction on demand: an energy-efficient solution
D Chaver, L Piñuel, M Prieto, F Tirado, MC Huang
Proceedings of the 2003 international symposium on Low power electronics and …, 2003
652003
Customizing the branch predictor to reduce complexity and energy consumption
MC Huang, D Chaver, L Pinuel, M Prieto, F Tirado
IEEE micro 23 (5), 12-25, 2003
432003
2-D wavelet transform enhancement on general-purpose microprocessors: Memory hierarchy and SIMD parallelism exploitation
D Chaver, C Tenllado, L Piñuel, M Prieto, F Tirado
International Conference on High-Performance Computing, 9-21, 2002
422002
Parallel wavelet transform for large scale image processing
D Chaver, M Prieto, L Piñuel, F Tirado
Proceedings 16th international parallel and distributed processing symposium …, 2002
422002
Reducing writes in phase-change memory environments by using efficient cache replacement policies
R Rodríguez-Rodríguez, F Castro, D Chaver, L Pinuel, F Tirado
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 93-96, 2013
322013
Vectorization of the 2D wavelet lifting transform using SIMD extensions
D Chaver, C Tenllado, L Pinuel, M Prieto, F Tirado
Proceedings International Parallel and Distributed Processing Symposium, 8 pp., 2003
262003
DMDC: delayed memory dependence checking through age-based filtering
F Castro, L Pinuel, D Chaver, M Prieto, M Huang, F Tirado
2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006
222006
ACFS: a completely fair scheduler for asymmetric single-isa multicore systems
JC Saez, A Pousa, F Castro, D Chaver, M Prieto-Matias
Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2027-2032, 2015
212015
Towards completely fair scheduling on asymmetric single-ISA multicore processors
JC Saez, A Pousa, F Castro, D Chaver, M Prieto-Matias
Journal of Parallel and Distributed Computing 102, 115-131, 2017
182017
Energy-aware fetch mechanism: trace cache and BTB customization
D Chaver, MA Rojas, L Pinuel, M Prieto, F Tirado, MC Huang
Proceedings of the 2005 international symposium on Low power electronics and …, 2005
182005
Load-store queue management: an energy-efficient design based on a state-filtering mechanism
F Castro, D Chaver, L Pinuel, M Prieto, F Tirado, M Huang
2005 International Conference on Computer Design, 617-624, 2005
172005
Wavelet transform for large scale image processing on modern microprocessors
D Chaver, C Tenllado, L Pinuel, M Prieto, F Tirado
International Conference on High Performance Computing for Computational …, 2002
152002
L1 data cache power reduction using a forwarding predictor
P Carazo, R Apolloni, F Castro, D Chaver, L Pinuel, F Tirado
International Workshop on Power and Timing Modeling, Optimization and …, 2010
122010
Substituting associative load queue with simple hash tables in out-of-order microprocessors
A Garg, F Castro, M Huang, D Chaver, L Pinuel, M Prieto
ISLPED'06 Proceedings of the 2006 International Symposium on Low Power …, 2006
112006
MIPSfpga: using a commercial MIPS soft-core in computer architecture education
SL Harris, DM Harris, D Chaver, R Owen, ZL Kakakhel, E Sedano, ...
IET Circuits, Devices & Systems 11 (4), 283-291, 2017
102017
Vectorization of the 2D wavelet lifting transform using SIMD extensions
C Tenllado, D Chaver, L Pinuel, M Prieto, F Tirado
Workshop on Parallel and Distributed Image Processing, Video Processing, and …, 2003
92003
An OS-oriented performance monitoring tool for multicore systems
JC Saez, J Casas, A Serrano, R Rodríguez-Rodríguez, F Castro, ...
European Conference on Parallel Processing, 697-709, 2015
82015
Exploring the throughput-fairness trade-off on asymmetric multicore systems
JC Saez, A Pousa, F Castro, D Chaver, M Prieto-Matías
European Conference on Parallel Processing, 326-337, 2014
82014
Delivering fairness and priority enforcement on asymmetric multicore systems via OS scheduling
JC Sáez, F Castro, D Chaver, M Prieto
ACM SIGMETRICS Performance Evaluation Review 41 (1), 343-344, 2013
82013
Memory disambiguation hardware: a review
F Castro, D Chaver, L Piñuel, M Prieto, F Tirado Fernández
Journal of Computer Science & Technology 8, 2008
82008
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Articles 1–20