Nanoscale-ringFET: an analytical drain current model including SCEs S Kumar, V Kumari, S Singh, M Saxena, M Gupta IEEE Transactions on Electron Devices 62 (12), 3965-3972, 2015 | 6 | 2015 |
TCAD assessment of dual material gate nanoscale RingFET (DMG-RingFET) for analog and digital applications S Kumar, V Kumari, M Gupta, M Saxena 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-5, 2014 | 2 | 2014 |
A Smart Healthcare Monitoring System Using Smartphone Interface S Kumar, P Pandey 2018 4th International Conference on Devices, Circuits and Systems (ICDCS …, 2018 | 1 | 2018 |
Sub-threshold drain current model of double gate RingFET (DG-RingFET) architecture: an analog and linearity performance investigation for RFIC design S Kumar, V Kumari, S Singh, M Saxena, M Gupta IETE Technical Review 35 (2), 169-179, 2018 | 1 | 2018 |
Reconnoiter the leavening of skin-deep insulated extension on analog performance of RingFET (SDIE-RingFET) S Kumar, V Kumari, S Singh, M Saxena, M Gupta AEU-International Journal of Electronics and Communications 83, 67-72, 2018 | 1 | 2018 |
Analytical drain current model for gate and channel engineered RingFET (GCE-RingFET) S Kumar, V Kumari, S Singh, M Saxena, M Gupta Superlattices and Microstructures 111, 1113-1120, 2017 | 1 | 2017 |
Investigation of III–V compound semiconductor materials on analog performance of Nanoscale RingFET S Kumar, M Gupta, V Kumari, M Saxena 2015 Annual IEEE India Conference (INDICON), 1-5, 2015 | | 2015 |