| A charge-plasma-based dielectric-modulated junctionless TFET for biosensor label-free detection D Singh, S Pandey, K Nigam, D Sharma, DS Yadav, P Kondekar IEEE Transactions on Electron Devices 64 (1), 271-278, 2016 | 178 | 2016 |
| Design and analysis of polarity controlled electrically doped tunnel FET with bandgap engineering for analog/RF applications PN Kondekar, K Nigam, S Pandey, D Sharma IEEE Transactions on Electron Devices 64 (2), 412-418, 2016 | 110 | 2016 |
| Drain work function engineered doping-less charge plasma TFET for ambipolar suppression and RF performance improvement: a proposal, design, and investigation BR Raad, D Sharma, P Kondekar, K Nigam, DS Yadav IEEE Transactions on Electron Devices 63 (10), 3950-3957, 2016 | 107 | 2016 |
| Performance investigation of bandgap, gate material work function and gate dielectric engineered TFET with device reliability improvement BR Raad, K Nigam, D Sharma, PN Kondekar Superlattices and Microstructures 94, 138-146, 2016 | 90 | 2016 |
| Dielectric and work function engineered TFET for ambipolar suppression and RF performance enhancement B Raad, K Nigam, D Sharma, P Kondekar Electronics Letters 52 (9), 770-772, 2016 | 84 | 2016 |
| Dual-material dual-oxide double-gate TFET for improvement in DC characteristics, analog/RF and linearity performance S Kumar, KS Singh, K Nigam, VA Tikkiwal, BV Chandan Applied Physics A 125 (5), 353, 2019 | 77 | 2019 |
| DC characteristics and analog/RF performance of novel polarity control GaAs-Ge based tunnel field effect transistor K Nigam, P Kondekar, D Sharma Superlattices and Microstructures 92, 224-231, 2016 | 68 | 2016 |
| Effect of interface trap charges on performance variation of heterogeneous gate dielectric junctionless-TFET S Gupta, K Nigam, S Pandey, D Sharma, PN Kondekar IEEE Transactions on Electron Devices 64 (11), 4731-4737, 2017 | 67 | 2017 |
| A barrier controlled charge plasma-based TFET with gate engineering for ambipolar suppression and RF/linearity performance improvement K Nigam, S Pandey, PN Kondekar, D Sharma, PK Parte IEEE Transactions on Electron Devices 64 (6), 2751-2757, 2017 | 63 | 2017 |
| Approach for ambipolar behaviour suppression in tunnel FET by workfunction engineering K Nigam, P Kondekar, D Sharma Micro & Nano Letters 11 (8), 460-464, 2016 | 59 | 2016 |
| A dielectrically modulated electrically doped tunnel FET for application of label free biosensor P Venkatesh, K Nigam, S Pandey, D Sharma, PN Kondekar Superlattices and Microstructures 109, 470-479, 2017 | 58 | 2017 |
| Impact of interface trap charges on analog/RF and linearity performances of dual-material gate-oxide-stack double-gate TFET KS Singh, S Kumar, K Nigam IEEE Transactions on Device and Materials Reliability 20 (2), 404-412, 2020 | 57 | 2020 |
| Impact of interface trap charges on performance of electrically doped tunnel FET with heterogeneous gate dielectric P Venkatesh, K Nigam, S Pandey, D Sharma, PN Kondekar IEEE Transactions on Device and Materials Reliability 17 (1), 245-252, 2017 | 57 | 2017 |
| Junctionless based dielectric modulated electrically doped tunnel FET based biosensor for label‐free detection BV Chandan, K Nigam, D Sharma Micro & Nano Letters 13 (4), 452-456, 2018 | 46 | 2018 |
| Performance comparison of single and dual metal dielectrically modulated TFETs for the application of label free biosensor M Verma, D Sharma, S Pandey, K Nigam, PN Kondekar Superlattices and Microstructures 101, 219-227, 2017 | 40 | 2017 |
| High frequency performance of dual metal gate vertical tunnel field effect transistor based on work function engineering K Nigam, P Kondekar, D Sharma Micro & Nano Letters 11 (6), 319-322, 2016 | 34 | 2016 |
| Low-K dielectric pocket and workfunction engineering for DC and analog/RF performance improvement in dual material stack gate oxide double gate TFET Dharmender, K Nigam Silicon 13, 2347-2356, 2021 | 31 | 2021 |
| Effect of ITC's on linearity and distortion performance of junctionless tunnel field effect transistor B Awadhiya, S Pandey, K Nigam, PN Kondekar Superlattices and Microstructures 111, 293-301, 2017 | 29 | 2017 |
| A new approach for design and investigation of junction-less tunnel FET using electrically doped mechanism K Nigam, P Kondekar, D Sharma, BR Raad Superlattices and Microstructures 98, 1-7, 2016 | 28 | 2016 |
| Impact of a metal-strip on a polarity-based electrically doped TFET for improvement of DC and analog/RF performance BV Chandan, M Gautami, K Nigam, D Sharma, VA Tikkiwal, S Yadav, ... Journal of Computational Electronics 18, 76-82, 2019 | 25 | 2019 |
Dr Dheeraj sharmaIndian Institute of Information Technology Design & Manufacturing JabalpurVerified email at iiitdmj.ac.in
