Mohamed Asan Basiri M
Mohamed Asan Basiri M
Department of ECE, IIITD&M Kurnool
Verified email at iiitk.ac.in
TitleCited byYear
An efficient hardware-based higher radix floating point MAC design
MA Basiri M, NM Sk
ACM Transactions On Design Automation of Electronic Systems (TODAES) 20 (1), 15, 2014
122014
An efficient hardware based MAC design in digital filters with complex numbers
MA Basiri M, NM Sk
2014 International Conference on Signal Processing and Integrated Networks …, 2014
82014
High speed multiplexer design using tree based decomposition algorithm
MA Basiri M, NM Sk
Microelectronics Journal 51, 99-111, 2016
62016
Configurable Folded IIR Filter Design
MA Basiri M, NM Sk
IEEE Transactions on Circuits and Systems II: Express Briefs 62 (12), 1144-1148, 2015
62015
Flexible VLSI Architectures for Galois Field Multipliers
MA Basiri M, SK Shukla
Integration, the VLSI Journal 59, 109-124, 2017
5*2017
Multiplication acceleration through quarter precision wallace tree multiplier
MA Basiri M, SC Nayak, NM Sk
2014 International Conference on Signal Processing and Integrated Networks …, 2014
52014
High Precision and High Speed Handheld Scientific Calculator Design Using Hardware based CORDIC Algorithm
S Kumar M, MA Basiri M, NM Sk
Procedia Engineering 64, 56-64, 2013
52013
Hardware optimizations for crypto implementations
MA Basiri M, SK Shukla
2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016
42016
An Efficient VLSI Architecture for Convolution Based DWT Using MAC
MA Basiri M, NM Sk
2018 31th International Conference on VLSI Design and 2018 17th …, 2018
3*2018
High Performance Integer DCT Architectures for HEVC
MA Basiri M, NM Sk
2017 30th International Conference on VLSI Design and 2017 16th …, 2017
3*2017
An efficient VLSI architecture for lifting based 1D/2D discrete wavelet transform
MA Basiri M, NM Sk
Microprocessors and Microsystems 47, 404-418, 2016
32016
Multi-mode parallel and folded VLSI architectures for 1D-fast Fourier transform
MA Basiri M, NM Sk
Integration, the VLSI Journal 55, 43-56, 2016
3*2016
An Efficient VLSI Architecture for Discrete Hadamard Transform
MA Basiri M, NM Sk
2016 29th International Conference on VLSI Design and 2016 16th …, 2016
22016
Memory Based Multiplier Design in Custom and FPGA Implementation
MA Basiri M, NM Sk
Advances in Intelligent Informatics, 253-265, 2015
22015
Asynchronous hardware implementations for crypto primitives
MA Basiri M, SK Shukla
Microprocessors and Microsystems 64, 221-236, 2019
1*2019
Efficient Hardware-Software Codesigns of AES Encryptor and RS-BCH Encoder
MA Basiri M, SK Shukla
International Symposium on VLSI Design and Test, 3-15, 2018
12018
Low power hardware implementations for network packet processing elements
MA Basiri M, SK Shukla
Integration, the VLSI Journal 62, 170-181, 2018
1*2018
Flexible Composite Galois Field GF((2^m)^2) Multiplier Designs
MA Basiri M, SK Shukla
2017 21st International Symposium on VLSI Design and Test, 3-14, 2017
12017
Quadruple throughput fixed point quarter precision multiply accumulate circuit design
MA Basiri M, NM Sk
IET Computers & Digital Techniques 11 (5), 183-189, 2017
12017
LFSR based Versatile Divider Architectures for BCH and RS Error Correction Encoders
MA Basiri M, SK Shukla
Microprocessors and Microsystems 71, 1-18, 2019
2019
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