| Design of low noise high speed novel dynamic analog comparator in 65nm technology A Majumder, M Das, B Nath, AJ Mondal, BK Bhattacharyya 2016 26th International Conference Radioelektronika (RADIOELEKTRONIKA), 115-120, 2016 | 12 | 2016 |
| LECTOR Based Clock Gating for Low Power Multi-Stage Flip Flop Applications P Bhattacharjee, B Nath, A Majumder arXiv preprint arXiv:1805.07409, 2018 | 7 | 2018 |
| A 23.52 μW/0.7 V multi-stage flip-flop architecture steered by a LECTOR-based gated clock P Bhattacharjee, A Majumder, B Nath IEIE Transactions on Smart Processing & Computing 6 (3), 220-227, 2017 | 6 | 2017 |
| Binary counter based gated clock tree for integrated CPU chip B Nath, A Majumder 2017 IEEE International Symposium on Nanoelectronic and Information Systems …, 2017 | 5 | 2017 |
| Design of ultra low power novel 3-bit flash ADC in 45nm CMOS technology M Das, B Nath, D Sarkar, A Kar, A Majumder 2015 International Conference on Smart Technologies and Management for …, 2015 | 5 | 2015 |
| A variation tolerant current mode low swing signaling approach for gigascale on-chip interface circuit A Majumder, B Nath, M Das, BK Bhattacharyya AEU-International Journal of Electronics and Communications 93, 140-149, 2018 | 4 | 2018 |
| A Floating-Gate-Based Four-Channel Reconfigurable Analog Front-End Integrated Circuit ZJ Lo, B Nath, YC Wang, YJ Huang, HC Huang, SY Peng 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2021 | 3 | 2021 |
| Voltage Keeper Based 28.27 µW New Frequency Divider Circuit in 90nm Technology for Gigascale Serdes Application B Nath, A Majumder, M Das, AJ Mondol, P Chakraborty, ... IEEE VLSI Circuit & System Letter 3 (2), 2017 | 2 | 2017 |
| Characterizing Single Line to Ground (SLG) Events with Indian Power Grid’s Synchrophasor Data B Nath, DS Roy International Conference on Innovation in Modern Science and Technology, 710-718, 2019 | 1 | 2019 |
| Comparative analysis of low power novel encoders for Flash ADC in 45nm technology A Kar, M Das, B Nath, D Sarkar, A Majumder 2015 International Conference on Smart Technologies and Management for …, 2015 | 1 | 2015 |
| A reconfigurable floating-gate-transistor-capacitor filter for analog signal processing SY Peng, HY Shih, B Nath Microelectronics Journal, 105944, 2023 | | 2023 |
| A biphasic current-mode stimulator integrated circuit with a novel residual charge compensation mechanism B Nath, SY Peng, ZJ Lo, YH Pai, YT Yeh, HH Chang, YC Lu, SH Huang, ... Integration 91, 79-88, 2023 | | 2023 |
| Cycle in a Conventional Combinational Circuit: A Comprehensive Survey A Majumder, B Nath, D Sarkar, M Das International Journal of Advanced Science and Technology 80, 53-78, 2015 | | 2015 |
| VLSI Circuits and Systems Letter B Nath, A Majumder, M Das, AJ Mondal, P Chakraborty, ... | | |
Alak MajumderAssistant Professor, NIT Arunachal Pradesh, IndiaVerified email at nitap.ac.in
