| Design and analysis of FPGA based 32 bit ALU using reversible gates SM Swamynathan, V Banumathi 2017 IEEE International Conference on Electrical, Instrumentation and …, 2017 | 22 | 2017 |
| Stability Enhancing SRAM cell for low power LUT Design SM Swamynathan, V Bhanumathi Microelectronics Journal 96, 104704, 2020 | 11 | 2020 |
| Multiple Single Input Change test patterns for testing VLSI circuits S Yasodharan, P Bhuvanesh, SM Swamynathan 2014 International Conference on Green Computing Communication and …, 2014 | 2 | 2014 |
| Efficient hardware trojan diagnosis in SRAM based on FPGA processors using inject detect masking algorithm for multimedia signal Processors SM Swamynathan, V Bhanumathi Microprocessors and Microsystems 77, 103168, 2020 | 1 | 2020 |
| Low Power Test Patterns Generation in BIST Schemes S Yasodharan, SM Swamynathan Programmable Device Circuits and Systems, 150-154, 2014 | 1 | 2014 |
| ATM PIN theft avoidance System BRKL Dr.Swamynathan S M,B.Manikandan Journal of Emerging Technologies and Innovative Research 10 (5), 2023 | | 2023 |
| Smart Instrument Cluster using UBLOX NEO 6M GPS with smart helmet S S M Journal of Emerging Technologies and Innovative Research 10 (4), 2023 | | 2023 |
| PERSONALIZED ATM PIN GENERATING SYSTEM BRKL Dr.Swamynathan S M,B.Manikandan Journal of Emerging Technologies and Innovative Research 9 (12), 422-426, 2022 | | 2022 |
| Hybrid Model of Smart Energy Consumption Monitoring System R Janani, B Indhumathi, AC Lincy, K Karthick, SM Swamynathan | | 2020 |
| Low Power Test Pattern Generation in BIST Schemes SSM S Yasodharan International Journal of Engineering Research and General Science 2 (3), 162-167, 2014 | | 2014 |
| Design and analysis of reconfigurable sram based fpga architectures SM Swamynathan Chennai, 0 | | |
