| Sleep transistor sizing using timing criticality and temporal currents A Ramalingam, B Zhang, A Devgan, DZ Pan Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005 | 70 | 2005 |
| An accurate sparse-matrix based framework for statistical static timing analysis A RAMALINGAM, A KUMAR SINGH, SR NASSIF, GJ NAM, ... Integration 45 (4), 365-375, 2012 | 62* | 2012 |
| An accurate sparse-matrix based framework for statistical static timing analysis A Ramalingam, AK Singh, SR Nassif, GJ Nam, M Orshansky, DZ Pan Integration, the VLSI Journal, 2011 | 62* | 2011 |
| An accurate sparse-matrix based framework for statistical static timing analysis A Ramalingam, AK Singh, SR Nassif, GJ Nam, M Orshansky, DZ Pan ICCAD '06 Proceedings of the 2006 IEEE/ACM international conference on …, 2006 | 62 | 2006 |
| Design for manufacturing meets advanced process control: A survey DZ Pan, P Yu, M Cho, A Ramalingam, K Kim, A Rajaram, SX Shi Journal of Process Control 18 (10), 975-984, 2008 | 34 | 2008 |
| Accurate waveform modeling using singular value decomposition with applications to timing analysis A Ramalingam, AK Singh, SR Nassif, M Orshansky, DZ Pan Proceedings of the 44th annual Design Automation Conference, 148-153, 2007 | 29 | 2007 |
| Wakeup Scheduling in MTCMOS circuits using successive relaxation to minimize ground bounce A Ramalingam, A Devgan, DZ Pan Journal of Low Power Electronics 3 (1), 28-35, 2007 | 25 | 2007 |
| Robust analytical gate delay modeling for low voltage circuits A Ramalingam, SV Kodakara, A Devgan, DZ Pan Proceedings of the 2006 Asia and South Pacific Design Automation Conference …, 2006 | 19 | 2006 |
| Accurate thermal analysis considering nonlinear thermal conductivity A Ramalingam, F Liu, SR Nassif, DZ Pan Quality Electronic Design, 2006. ISQED'06. 7th International Symposium on, 6 …, 2006 | 10 | 2006 |
| Latch modeling for statistical timing analysis SX Shi, A Ramalingam, D Wang, DZ Pan Proceedings of the conference on Design, automation and test in Europe, 1136 …, 2008 | 8 | 2008 |
| Accurate power grid analysis with behavioral transistor network modeling A Ramalingam, GV Devarayanadurg, DZ Pan Proceedings of the 2007 international symposium on Physical design, 43-50, 2007 | 7 | 2007 |
| Bernoulli runs using ‘book cricket’to evaluate cricketers A Ramalingam Resonance 17 (5), 441-453, 2012 | 1 | 2012 |
| Analysis techniques for nanometer digital integrated circuits A Ramalingam The University of Texas at Austin, 2007 | | 2007 |
