Nicholas P. Carter
Nicholas P. Carter
Verified email at g.harvard.edu
Title
Cited by
Cited by
Year
The m-machine multicomputer
M Fillo, SW Keckler, WJ Dally, NP Carter, A Chang, Y Gurevich, WS Lee
International Journal of Parallel Programming 25 (3), 183-212, 1997
2831997
The m-machine multicomputer
M Fillo, SW Keckler, WJ Dally, NP Carter, A Chang, Y Gurevich, WS Lee
International Journal of Parallel Programming 25 (3), 183-212, 1997
2831997
DeNovo: Rethinking the memory hierarchy for disciplined parallelism
B Choi, R Komuravelli, H Sung, R Smolinski, N Honarmand, SV Adve, ...
2011 International Conference on Parallel Architectures and Compilation …, 2011
1872011
Exploiting fine-grain thread level parallelism on the MIT multi-ALU processor
SW Keckler, WJ Dally, D Maskit, NP Carter, A Chang, WS Lee
ACM SIGARCH Computer Architecture News 26 (3), 306-317, 1998
1391998
Memory system with global address translation
NP Carter, SW Keckler, WJ Dally
US Patent 6,003,123, 1999
1331999
Hardware support for fast capability-based addressing
NP Carter, SW Keckler, WJ Dally
ACM SIGOPS Operating Systems Review 28 (5), 319-327, 1994
1221994
Runnemede: An architecture for ubiquitous high-performance computing
NP Carter, A Agrawal, S Borkar, R Cledat, H David, D Dunning, J Fryman, ...
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
1142013
Memory system including guarded pointers
NP Carter, SW Keckler, WJ Dally
US Patent 5,845,331, 1998
981998
Design techniques for cross-layer resilience
NP Carter, H Naeimi, DS Gardner
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
722010
Vision for cross-layer optimization to address the dual challenges of energy and reliability
A DeHon, HM Quinn, NP Carter
2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010
602010
An efficient, protected message interface
WS Lee, WJ Dally, SW Keckler, NP Carter, A Chang
Computer 31 (11), 69-75, 1998
371998
Comparing adaptive routing and dynamic voltage scaling for link power reduction
JM Stine, NP Carter, J Flich
IEEE Computer Architecture Letters 3 (1), 4-4, 2004
342004
Exposing control of power and clock gating for software
NP Carter, JB Fryman, RC Knauerhase, AB Agrawal, J Torrellas
US Patent App. 13/630,738, 2014
282014
Clustered programmable-reconfigurable processors
DB Gottlieb, JJ Cook, JD Walstrom, S Ferrera, CW Wang, NP Carter
2002 IEEE International Conference on Field-Programmable Technology, 2002 …, 2002
262002
Error management across hardware and software layers
NP Carter, DS Gardner, EC Hannah, H Naeimi, SY Borkar, M Haycock
US Patent App. 13/036,826, 2012
222012
A combined bayesian markovian approach for behaviour recognition
N Carter, D Young, J Ferryman
18th International Conference on Pattern Recognition (ICPR'06) 1, 761-764, 2006
212006
Final report for CCC cross-layer reliability visioning study
A DeHon, N Carter, H Quinn
Computing Community Consortium, http://www. cra. org/ccc/xlayer. php, 2011
172011
Architecture of a self-checkpointing microprocessor that incorporates nanomagnetic devices
L Kothari, NP Carter
IEEE Transactions on Computers 56 (2), 161-173, 2007
162007
CCC visioning study: system-level cross-layer cooperation to achieve predictable systems from unpredictable components
HM Quinn, A De Hon, N Carter
Los Alamos National Lab.(LANL), Los Alamos, NM (United States), 2011
122011
The design of the amalgam reconfigurable cluster
JD Walstrom, JJ Cook, DB Gottlieb, S Ferrera, CW Wang, NP Carter
Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom …, 2002
112002
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