Follow
Dr.M.VENKATESH,M.E.,Ph.D                                     (0000-0002-9292-8994)
Dr.M.VENKATESH,M.E.,Ph.D (0000-0002-9292-8994)
Associate Professor & Research Head (DRC),Department of ECE,CMR Institute of Technology,Bengaluru
Verified email at cmrit.ac.in
Title
Cited by
Cited by
Year
Influence of Threshold Voltage Performance Analysis on Dual Halo Gate Stacked Triple Material Dual Gate TFET for Ultra Low Power Applications
M Venkatesh, NB Balamurugan
Silicon, 1-13, 2020
292020
New subthreshold performance analysis of germanium based dual halo gate stacked triple material surrounding gate tunnel field effect transistor
M Venkatesh, NB Balamurugan
Superlattices and Microstructures 130, 485-498, 2019
262019
Subthreshold performance analysis of germanium source dual halo dual dielectric triple material surrounding gate tunnel field effect transistor for ultra low power applications
M Venkatesh, M Suguna, NB Balamurugan
Journal of Electronic Materials, 1-11, 2019
192019
Analytical Modeling and Simulation of Gate-All-Around Junctionless Mosfet for Biosensing Applications
S Preethi, M Venkatesh, M Karthigai Pandian, G Lakshmi Priya
Silicon, 1-10, 2021
182021
Triple Metal Surrounding Gate Junctionless Tunnel FET based 6T SRAM Design For Low Leakage Memory System
G Lakshmi Priya, M Venkatesh, NB Balamurugan, TS Arun Samuel
Silicon, 2021
17*2021
Influence of Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate Tunnel FET for Improved Analog/RF Performance
M Venkatesh, M Suguna, NB Balamurugan
Silicon, 1-9, 2020
172020
Investigation of ON Current and Subthreshold Swing of an InSb/Si Heterojunction Stacked Oxide Double-Gate TFET with Graphene Nanoribbon
TS Arun Samuel, M Venkatesh, M Karthigai Panidan, P Vimala
Journal of Electronic Materials, 2021
152021
Investigation of Ambipolar Conduction and RF Stability Performance in Novel Germanium Source Dual Halo Dual Dielectric Triple Material Surrounding Gate TFET
M Venkatesh, GL Priya, NB Balamurugan
Silicon, 1-8, 2020
132020
A Novel Metal Dielectric Metal Based GAA-Junction-Less TFET Structure for Low Loss SRAM Design
L Agarwal, GL Priya, E Papnassam, BP Kumar, M Venkatesh
Silicon, 1-13, 2022
82022
Modeling and Simulation of Double Gate Dielectric Stack Silicon Substrate Memristor Circuits for Low Power Applications
G Lakshmi Priya, N Rawat, S Abhishek, M Venkatesh
Silicon, 2022
62022
Hybrid Silicon Substrate FinFET-Metal Insulator Metal (MIM) Memristor Based Sense Amplifier Design for the Non-Volatile SRAM Cell
GL Priya, M Venkatesh, AA Roobert, N Rawat, S Abhishek
Micromachines 14 (2), 10.3390/mi14020232, 2023
42023
Design and analysis of 28 GHz CMOS low power LNA with 6.4 dB gain variability for 5G applications
AA Roobert, PS Arunodhayamary, DGN Rani, M Venkatesh, LJ Julus
Transactions on Emerging Telecommunications Technologies, 1-11, 2022
42022
Modeling and performance analysis of Nanocavity Embedded Dopingless T-shaped Tunnel FET with high-K gate dielectric for biosensing applications
GL Priya, M Venkatesh, L Agarwal, A Samuel
Applied Physics A: Materials Science and Processing 128 (11), 1-11, 2022
32022
Surface Potential Analysis of Dual Material Gate Silicon-Based Ferroelectric TFET for Biosensing Application
M Venkatesh, P Parthasarathy, UA Kumar
ECS Journal of Solid State Science and Technology, DOI 10.1149/2162-8777/ad1ac8, 2024
12024
Charge Density Based Small Signal Modeling for InSb/AlInSb Asymmetric Double Gate Silicon Substrate HEMT for High Frequency Applications
T Venish Kumar, M Venkatesh, B Muthupandian, G Lakshmi Priya
Silicon, 1-10, 2021
12021
Graphene Channel Dielectric VTFET Biosensor for SARS-CoV-2: Modelling, Fabrication, Characterization and Its Investigation on Genomic Classification in Spike Proteins
M Venkatesh, P Parthasarathy
BioNanoScience, 2023
2023
Challenges of Conventional CMOS Technology in Perspective of Low-Power Applications
AA Robert, M Venkatesh, GL Priya, G Gifta, LJ Julus
Tunneling Field Effect Transistors, 16, 2023
2023
Dual Gate Ferroelectric Tunnel FET Biosensor: A novel Pocket doped design and material for future energy-efficient low-power devices
M Venkatesh, P Parthasarathy, A Roobert A
IN Patent App. 202,341,045,740, 2023
2023
Heterostructure performance evaluation: A numerical simulation and analytical modeling of the ferroelectric pocket doped double gate tunnel FET
JE Jeyanthi, TSA Samuel, YS Song, M Venkatesh
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2023
2023
A COLOR GUIDED MATERIAL HANDLING ROBOTIC PLATFORM
SP Singh, SP Rajan, M Venkatesh, P Chithambaranathan
IN Patent 357157-001, 2022
2022
The system can't perform the operation now. Try again later.
Articles 1–20