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Balamurugan V
Balamurugan V
SATHYABAMA UNIVERSITY
Verified email at sathyabama.ac.in
Title
Cited by
Cited by
Year
Design of cognitive image filters for suppression of noise level in medical images
S Prabu, V Balamurugan, K Vengatesan
Measurement 141, 296-301, 2019
522019
Mobile technologies for contact tracing and prevention of COVID-19 positive cases: a cross- sectional study
JK Prabu S. , Balamurugan Velan , Christalin Nelson S. , Jayasudha F.V ...
2020/08/28 18 (2), 226-235, 0
37*
Design of A 16 PSK Viterbi decoder for high bit data rate decoder
SH Prakash, V Balamurugan
2015 International Conference on Control, Instrumentation, Communication and …, 2015
62015
A high speed and less area multiplier for high speed processor by SDT technique
M Sabarinathan, G Omprakash, V Balamurugan
International Journal of Electronics and Communication Engineering 2 (2), 2013
42013
Biometric finger vein based bank security system using ARDUINO and GSM technology
LJA Marcilin, V Balamurugan, A Vijayaiyyappan
Int. J. Appl. Eng. Res 13 (11), 8774-8777, 2018
32018
Design and performance analysis of a high speed mac using different multipliers
P Mavuri, B Velan
2015 Fifth International Conference on Advances in Computing and …, 2015
22015
Performance Evaluation of BPN Based Viterbi Decoder for Decoding 2-bit and 3-bit Errors
V Balamurugan, NM Nandhitha
ARPN Journal of Engineering and Applied Sciences 10 (4), 2015
22015
An Advanced Attendance Marking system using facial Recognition
J Vamsikrishna, K Anudeep, LJA Marcilin, V Balamurugan
IOP Conference Series: Materials Science and Engineering 590 (1), 012049, 2019
12019
Design and FPGA implementation of MAC using fault tolerant reversible logic gates
V Balamurugan, LJA Marcilin
2017 International Conference on Energy, Communication, Data Analytics and …, 2017
12017
Design of low power radix-2 and radix-4 ACSU in Viterbi decoder using HSPICE
PS Harsha, V Balamurugan
2016 Online International Conference on Green Engineering and Technologies …, 2016
12016
Design of less time delay Multiplier using Vedic Mathematics
M Dogra, V Balamurugan
2016 Online International Conference on Green Engineering and Technologies …, 2016
12016
Design and implementation of Fast Radix-2 and radix-4 ACSU with different adders in Viterbi decoder
V Balamurugan
2016 Online International Conference on Green Engineering and Technologies …, 2016
12016
Study on the impact of CDFG on the design aspects of combinational logic circuits
V Balamurugan, NM Nandhitha
2014 International Conference on Control, Instrumentation, Communication and …, 2014
12014
Review on design of less complex, high speed Viterbi decoders for accurate extraction of message bits
BN HariChandana, Y Bhagyasri, V Balamurugan, NM Nandhitha
2016 Online International Conference on Green Engineering and Technologies …, 2016
2016
SOFT COMPUTING TECHNIQUE BASED HIGH SPEED VITERBI DECODER FOR EFFICIENT TRANSMISSION AND RETRIEVAL OF IMAGES IN ROBUST ENVIRONMENT
V Balamurugan, NM Nandhitha
PONTE International Journal of Science and Research 72 (9), 2016
2016
Feasibility of Less Complex Viterbi Decoder Based on Neural Networks for Effective Transmission of Medical Images
V Balamurugan, NM Nandhitha
2015
High Speed ALU for High Speed Processor Using C-Element
S Ramachandran, M Sabarinathan, G Omprakash, V Balamurugan
2013
EFFICIENT BLOCK CODES FOR ERROR CORRECTION USING LOW DENSITY PARITY CHECK CODES
M Shyam, G Sreekanth, V Balamurugan
2006
PERFORMANCE EVALUATION OF ACS IN VITERBI DECODER USING PARALLEL PREFIX ADDERS
M Balaji, P Arun, V Balamurugan
2006
AN FPGA BASED ADAPTIVE VITERBI DECODER IMPLEMENTING PATH METRIC CALCULATION
A VijayaIyyappan, V Balamurugan
2006
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