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Partha Ghosh
Partha Ghosh
Principal Member of Technical Staff (PMTS) Engineer AMD inc.
Verified email at amd.com - Homepage
Title
Cited by
Cited by
Year
A 2.5 GHz radiation hard fully self-biased PLL using 0.25 µm SOS-CMOS technology
PP Ghosh, E Xiao
2009 IEEE International Conference on IC Design and Technology, 121-124, 2009
92009
Design of a new CMOS low noise amplifier for ultra wide-band wireless receiver in 0.18/spl mu/m technology
PP Ghosh, E Xiao
2005 IEEE International Conference on Ultra-Wideband, 514-519, 2005
42005
Design and study of phase locked loop for space applications in sub-micron CMOS technology
PP Ghosh
The University of Texas at Arlington, 2009
32009
Design of radiation hard phase-locked loop at 2.5 GHz using SOS-CMOS
PP Ghosh, L Mingyu, J Sungyong
Journal of Systems Engineering and Electronics 20 (6), 1159-1166, 2009
12009
Hot carrier and soft breakdown effects on LNA performance for ultra wideband communications
E Xiao, PP Ghosh, C Yu, JS Yuan
Microelectronics Reliability 45 (9-11), 1382-1385, 2005
12005
Stress induced performance degradation in LC oscillators
E Xiao, PP Ghosh
Proceedings of the 2005 IEEE International Frequency Control Symposium and …, 2005
12005
Design of a new low noise amplifier for ultra wide-band wireless receiver
PP Ghosh
The University of Texas at Arlington, 2005
2005
2009 IEEE International Conference on IC Design and Technology (ICICDT)
R Joshi, R Kanj
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