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Gaurav Musalgaonkar
Gaurav Musalgaonkar
IIT Delhi, Micron Technology
Verified email at intel.com
Title
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Cited by
Year
Nanotube tunneling FET with a core source for ultrasteep subthreshold swing: A simulation study
G Musalgaonkar, S Sahay, RS Saxena, MJ Kumar
IEEE Transactions on Electron Devices 66 (10), 4425-4432, 2019
572019
A line tunneling field-effect transistor based on misaligned core–shell gate architecture in emerging nanotube FETs
G Musalgaonkar, S Sahay, RS Saxena, MJ Kumar
IEEE Transactions on Electron Devices 66 (6), 2809-2816, 2019
492019
An impact ionization MOSFET with reduced breakdown voltage based on back-gate misalignment
G Musalgaonkar, S Sahay, RS Saxena, MJ Kumar
IEEE Transactions on Electron Devices 66 (2), 868-875, 2018
162018
An HDR pixel with over 60-dB dynamic range enhancement using in-pixel parametric amplification
G Musalgaonkar, N Priyadarshini, M Sarkar
IEEE Transactions on Electron Devices 65 (2), 555-563, 2017
42017
An active load single-ended double flipped voltage follower amplifier and its application
S Agrawal, A Shrivastava, A Kumar, G Musalgaonkar
2016 International Conference on Electrical, Electronics, and Optimization …, 2016
32016
TCAD simulation analysis and comparison between triple gate rectangular and trapezoidal finfet
G Musalgaonkar, AK Chatterjee
Journal of Electron Devices 21, 1881-1887, 2015
32015
Controlling L-BTBT in the ultra-short channel nanowire junctionless accumulation FETs using overlapping gate-on-drain
AK Jain, G Musalgaonkar, MJ Kumar
2019 Joint International EUROSOI Workshop and International Conference on …, 2019
22019
CMOS image sensor with tunable conversion gain for improved performance
G Musalgaonkar, RS Saxena
Sensing and Imaging 20 (1), 16, 2019
12019
A Novel Low-Voltage Differential Double Flipped Voltage Follower Strucutre and Its Derivatives.
A Shrivastava, G Musalgaonkar
Journal of Active & Passive Electronic Devices 11, 2016
12016
Altering breakdown voltages in gate devices and related methods and systems
G Musalgaonkar, N Kaushik, S Jain, H Liu, CR Parthasarathy
US Patent App. 17/647,912, 2023
2023
Correction to: CMOS Image Sensor with Tunable Conversion Gain for Improved Performance
G Musalgaonkar, RS Saxena
Sensing and Imaging 20, 1-2, 2019
2019
STI based trench capacitor for high sensitivity and high dynamic range in CMOS image sensor
G Musalgaonkar, M Sarkar, RS Saxena
2017 International Conference on Electron Devices and Solid-State Circuits …, 2017
2017
Simulation Study of Tapered Shape FinFET
G Musalgaonkar, A Shrivastava, S Singh, A Acharya
Journal of VLSI Design Tools & Technology 6 (1), 21-31, 2016
2016
Design and Analysis of a Low Power Tri-Gate Trapezoidal Finfet
G Musalgaonkar, AKG Chatterjee
2015
Design and analysis of emerging nanoscale mosfets from low power and high speed perspective
G Musalgaonkar
Delhi, 0
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