Dipankar Das
Dipankar Das
Intel Parallel Computing Labs, Intel Labs
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Cited by
Cited by
Graphmat: High performance graph analytics made productive
N Sundaram, NR Satish, MMA Patwary, SR Dulloor, SG Vadlamudi, ...
arXiv preprint arXiv:1503.07241, 2015
Scaledeep: A scalable compute architecture for learning and evaluating deep networks
S Venkataramani, A Ranjan, S Banerjee, D Das, S Avancha, ...
Proceedings of the 44th Annual International Symposium on Computer …, 2017
Sigma: A sparse and irregular gemm accelerator with flexible interconnects for dnn training
E Qin, A Samajdar, H Kwon, V Nadella, S Srinivasan, D Das, B Kaul, ...
2020 IEEE International Symposium on High Performance Computer Architecture …, 2020
Distributed deep learning using synchronous stochastic gradient descent
D Das, S Avancha, D Mudigere, K Vaidynathan, S Sridharan, D Kalamkar, ...
arXiv preprint arXiv:1602.06709, 2016
Reconfigurable interface-based electrical architecture
D Das, VK Agrawal, S Rajappan
US Patent 8,930,036, 2015
Out-of-distribution detection using an ensemble of self supervised leave-out classifiers
A Vyas, N Jammalamadaka, X Zhu, D Das, B Kaul, TL Willke
Proceedings of the European Conference on Computer Vision (ECCV), 550-564, 2018
A study of BFLOAT16 for deep learning training
D Kalamkar, D Mudigere, N Mellempudi, D Das, K Banerjee, S Avancha, ...
arXiv preprint arXiv:1905.12322, 2019
Mixed precision training of convolutional neural networks using integer operations
D Das, N Mellempudi, D Mudigere, D Kalamkar, S Avancha, K Banerjee, ...
arXiv preprint arXiv:1802.00930, 2018
Ternary neural networks with fine-grained quantization
N Mellempudi, A Kundu, D Mudigere, D Das, B Kaul, P Dubey
arXiv preprint arXiv:1705.01462, 2017
Parallel efficient sparse matrix-matrix multiplication on multicore platforms
M Patwary, M Ali, NR Satish, N Sundaram, J Park, MJ Anderson, ...
International Conference on High Performance Computing, 48-57, 2015
Improving concurrency and asynchrony in multithreaded MPI applications using software offloading
K Vaidyanathan, DD Kalamkar, K Pamnany, JR Hammond, P Balaji, ...
SC'15: Proceedings of the International Conference for High Performance …, 2015
Mixed precision training with 8-bit floating point
N Mellempudi, S Srinivasan, D Das, B Kaul
arXiv preprint arXiv:1905.12334, 2019
Abstraction layers for scalable distributed machine learning
DD Kalamkar, K Vaidyanathan, S Sridharan, D Das
US Patent 11,094,029, 2021
On scale-out deep learning training for cloud and hpc
S Sridharan, K Vaidyanathan, D Kalamkar, D Das, ME Smorkalov, ...
arXiv preprint arXiv:1801.08030, 2018
Mixed low-precision deep learning inference using dynamic fixed point
N Mellempudi, A Kundu, D Das, D Mudigere, B Kaul
arXiv preprint arXiv:1701.08978, 2017
Apparatuses, methods, and systems for neural networks
S Venkataramani, D Das, A Ranjan, S Banerjee, S Avancha, ...
US Patent App. 16/317,497, 2019
Dictionary based code compression for variable length instruction encodings
D Das, R Kumar, PP Chakrabarti
18th International Conference on VLSI Design held jointly with 4th …, 2005
X-mann: A crossbar based architecture for memory augmented neural networks
A Ranjan, S Jain, JR Stevens, D Das, B Kaul, A Raghunathan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
Methods and systems for diagnosing hardware and software faults using time-stamped events
P Sinha, D Das
US Patent 8,464,102, 2013
Manna: An accelerator for memory-augmented neural networks
JR Stevens, A Ranjan, D Das, B Kaul, A Raghunathan
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
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