Ramanuj Chouksey
Ramanuj Chouksey
Cadence Design Systems
Verified email at iitg.ac.in - Homepage
Cited by
Cited by
Translation validation of code motion transformations involving loops
R Chouksey, C Karfa, P Bhaduri
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
Translation validation of loop invariant code optimizations involving false computations
R Chouksey, C Karfa, P Bhaduri
International Symposium on VLSI Design and Test, 767-778, 2017
Verification of Scheduling of Conditional Behaviors in High-Level Synthesis
R Chouksey, C Karfa
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (7 …, 2020
Is register transfer level locking secure?
C Karfa, R Chouksey, C Pilato, S Garg, R Karri
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 550-555, 2020
Improving performance of a path-based equivalence checker using counter-examples
R Chouksey, C Karfa, P Bhaduri
2019 32nd International Conference on VLSI Design and 2019 18th …, 2019
Automatic detection of inverse operations while avoiding loop unrolling
K Banerjee, R Chouksey, C Karfa, P Kalita
Proceedings of the 40th International Conference on Software Engineering …, 2018
Formal Verification of Optimizing Transformations during High-level Synthesis
R Chouksey, C Karfa, P Bhaduri
Proceedings of the 12th Innovations on Software Engineering Conference …, 2019
Counter-example generation procedure for path-based equivalence checkers
R Chouksey, C Karfa, K Banerjee, PK Kalita, P Bhaduri
IET Software 13 (4), 280-285, 2018
ECDLP based proxy multi-signature scheme
R Chouksey, R Sivashankari, P Singhai
Advances in Computing and Information Technology, 71-79, 2012
VP_TT: A value propagation based equivalence checker for testability transformations
R Chouksey, SK Maddheshiya, C Karfa
IET Software 15 (1), 147-159, 2021
SAT Based Partial Attack on Compound Logic Locking
M John, A Hoda, R Chouksey, C Karfa
2020 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 1-6, 2020
Automatic Inverse Operation Detection and its Impact in High-level Synthesis
PK Kalita, R Chouksey, C Karfa
2020 24th International Symposium on VLSI Design and Test (VDAT), 1-4, 2020
Formal Verification of Access Control Policies.
R Chouksey, R Sivashankari
International Journal of Advanced Research in Computer Science 2 (3), 2011
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