| Low power VLSI circuits design strategies and methodologies: A literature review SK Varadharajan, V Nallasamy 2017 Conference on Emerging Devices and Smart Systems (ICEDSS), 245-251, 2017 | 32 | 2017 |
| Deadlock free routing algorithm for minimizing congestion in a Hamiltonian connected recursive 3D-NoCs K Somasundaram, J Plosila, N Viswanathan Microelectronics Journal 45 (8), 989-1000, 2014 | 20 | 2014 |
| An optimised 3D topology for on-chip communications N Viswanathan, K Paramasivam, K Somasundaram International Journal of Parallel, Emergent and Distributed Systems 29 (4 …, 2014 | 15 | 2014 |
| Exploring optimal topology and routing algorithm for 3D network on chip N Viswanathan, K Paramasivam, K Somasundaram American Journal of Applied Sciences 9 (3), 300, 2012 | 12 | 2012 |
| P‐SCADA‐a novel area and energy efficient FPGA architectures for LSTM prediction of heart arrthymias in BIoT applications SK Varadharajan, V Nallasamy Expert Systems 39 (3), e12687, 2022 | 9 | 2022 |
| Exploring hierarchical, cluster based 3D topologies for 3D NoC N Viswanathan, K Paramasivam, K Somasundaram Procedia Engineering 30, 606-615, 2012 | 9 | 2012 |
| Performance analysis of cluster based 3D routing algorithms for NoC N Viswanathan, K Paramasivam, K Somasundaram 2011 IEEE Recent Advances in Intelligent Computational Systems, 157-162, 2011 | 9 | 2011 |
| An integrated and automated testing approach on Inception Restnet-V3 based on convolutional neural network for leukocytes image classification S Palanivel, V Nallasamy Biomedical Engineering/Biomedizinische Technik 68 (2), 165-174, 2023 | 3 | 2023 |
| RETRACTED: A novel hybrid optimized and adaptive reconfigurable framework for the implementation of hybrid bio-inspired classifiers for diagnosis P Ramamoorthy, V Nallasamy Microprocessors and Microsystems 73, 102960, 2020 | 3 | 2020 |
| Review of Multiplierless Fir Filter Design Based On Graph Based Optimization P Ramamoorthy, V Nallasamy 2018 Conference on Emerging Devices and Smart Systems (ICEDSS), 276-279, 2018 | 3 | 2018 |
| Performance and cost metrics analysis of a 3D NOC topology using network Calculus N Viswanathan, K Paramasivam, K Somasundaram Applied Mathematical Sciences 7 (84), 4173-4184, 2013 | 3 | 2013 |
| Cat-Inspired Deep Convolutional Neural Network for Bone Marrow Cancer Cells Detection. R Kavitha, N Viswanathan Intelligent Automation & Soft Computing 33 (2), 2022 | 1 | 2022 |
| Vertical links minimized 3D NoC topology and router-arbiter design. N Viswanathan, K Paramasivam, K Somasundaram Int. Arab J. Inf. Technol. 15 (3), 469-478, 2018 | 1 | 2018 |
| Performance Comparison of 3D NoC Topologies using Network Calculus N Viswanathan, K Paramasivam, K Somasundaram Life Science Journal 10 (1), 2013 | 1 | 2013 |
| ECG-NETS–Anovelintegration of capsule networks and extreme gated recurrent neural network for IoT based human activity recognition S Arokiaraj, N Viswanathan Journal of Intelligent and fuzzy systems 44 (5), 8219-8229, 2023 | | 2023 |
| Implementation of Field Programmable Gate Array (FPGA) Based Distributed Arithmetic Gated Current Unit to Achieve High ECG Diagnosis Rate SK Varadharajan, V Nallasamy Journal of Nanoelectronics and Optoelectronics 17 (1), 82-89, 2022 | | 2022 |
| Design and Evaluation of Elastic Buffer Router Architecture for 3D NoC using Partially Vertically Connected 3D Topology V Nallasamy, P Mohan, S Kanagasabhapathi Asian Journal of Research in Social Sciences and Humanities 6 (4), 625-639, 2016 | | 2016 |
| AREA AND DELAY MINIMIZED PROGRAMMABLE PREFIX ARBITERS FOR ON-CHIP COMMUNICATIONS V Nallasamy ICTACT JOURNAL ON MICROELECTRONICS, 1 (1), 23-26, 2015 | | 2015 |
| Certain investigations on vertically Partially connected 3d network On chip topology and arbiter design With optimized parameters N Viswanathan Chennai, 0 | | |
Kanagasabapathi SomasundaramProfessor, Department of Mathematics, Amrita School of Engineering, Amrita Vishwa VidyapeethamVerified email at cb.amrita.edu
