| Construction of Optimum Composite Field Architecture for Compact High-Throughput AES S-Boxes MM Wong, MLD Wong, AK Nandi, I Hijazin Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 1-5, 0 | 64 | |
| Compact FPGA implementation of PRESENT with Boolean S-Box JJ Tay, MLD Wong, MM Wong, C Zhang, I Hijazin 2015 6th Asia Symposium on Quality Electronic Design (ASQED), 144-148, 2015 | 57 | 2015 |
| A new high throughput and area efficient SHA-3 implementation MM Wong, J Haj-Yahya, S Sau, A Chattopadhyay 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 55 | 2018 |
| Lightweight secure-boot architecture for risc-v system-on-chip J Haj-Yahya, MM Wong, V Pudi, S Bhasin, A Chattopadhyay 20th International Symposium on Quality Electronic Design (ISQED), 216-223, 2019 | 45 | 2019 |
| Composite field GF(((2^2^)2)^2) Advanced Encryption Standard (AES) S-box with algebraic normal form representation in the subfield inversion MM Wong, MLD Wong, AK Nandi, I.Hijazin IET Circuits, Devices & Systems 5 (6), 471-476, 2011 | 36 | 2011 |
| A high throughput low power compact AES S-box implementation using composite field arithmetic and Algebraic Normal Form representation MM Wong, MLD Wong 2nd Asia Symposium on Quality Electronic Design (ASQED), 318-323, 2010 | 29 | 2010 |
| Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency L Yang, H Zhang, T Luo, C Qu, MTL Aung, Y Cui, J Zhou, MM Wong, J Pu, ... Neurocomputing 474, 128-140, 2022 | 25 | 2022 |
| A 5.28-mm˛ 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router J Pu, WL Goh, VP Nambiar, MM Wong, AT Do IEEE Transactions on Circuits and Systems I: Regular Papers 68 (12), 5081-5094, 2021 | 24 | 2021 |
| Public misperceptions about transmission of hepatitis B virus in Singapore W Lu, B Mak, S Lim, MO Aung, M Wong, C Wai ANNALS-ACADEMY OF MEDICINE SINGAPORE 36 (10), 797, 2007 | 24 | 2007 |
| Compact and low power aes block cipher using lightweight key expansion mechanism and optimal number of s-boxes JJ Tay, MM Wong, I Hijazin 2014 International Symposium on Intelligent Signal Processing and …, 2014 | 22 | 2014 |
| Circuit and system design for optimal lightweight AES encryption on FPGA MM Wong, DML Wong, C Zhang, I Hijazin | 21 | 2018 |
| 0.5 V 4.8 pJ/SOP 0.93\mu\mathrm {W} $ Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron VP Nambiar, J Pu, YK Lee, A Mani, T Luo, L Yang, EK Koh, MM Wong, ... 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-4, 2020 | 19 | 2020 |
| Survey of secure processors S Sau, J Haj-Yahya, MM Wong, KY Lam, A Chattopadhyay 2017 International Conference on Embedded Computer Systems: Architectures …, 2017 | 18 | 2017 |
| A new common subexpression elimination algorithm with application in composite field AES S-box MM Wong, MLD Wong Information Sciences Signal Processing and their Applications (ISSPA), 2010 …, 2010 | 17 | 2010 |
| A 2.1 pJ/SOP 40nm SNN accelerator featuring on-chip transfer learning using Delta STDP MM Wong, SB Shrestha, VP Nambiar, A Mani, YK Lee, EK Koh, W Jiang, ... ESSDERC 2021-IEEE 51st European Solid-State Device Research Conference …, 2021 | 16 | 2021 |
| SMARTS: secure memory assurance of RISC-V trusted SoC MM Wong, J Haj-Yahya, A Chattopadhyay Proceedings of the 7th International Workshop on Hardware and Architectural …, 2018 | 16 | 2018 |
| Lightweight and high performance SHA-256 using architectural folding and 4-2 adder compressor MM Wong, V Pudi, A Chattopadhyay 2018 IFIP/IEEE International Conference on Very Large Scale Integration …, 2018 | 12 | 2018 |
| New lightweight AES S-box using LFSR MM Wong, MLD Wong 2014 International Symposium on Intelligent Signal Processing and …, 2014 | 9 | 2014 |
| Composite field GF (((22) 2) 2) AES S-Box with direct computation in GF (24) inversion MM Wong, MLD Wong, I Hijazin, AK Nandi Information Technology in Asia (CITA 11), 2011 7th International Conference …, 2011 | 8 | 2011 |
| Compact and short critical path finite field inverter for cryptographic S-box MM Wong, MLD Wong, C Zhang, I Hijazin 2015 IEEE International Conference on Digital Signal Processing (DSP), 775-779, 2015 | 5 | 2015 |
M. L. Dennis WongNewcastle UniversityVerified email at newcastle.ac.uk
