Low-frequency noise analysis and modeling in vertical tunnel FETs with Ge source FS Neves, PGD Agopian, JA Martino, B Cretu, R Rooyackers, ... IEEE Transactions on Electron Devices 63 (4), 1658-1665, 2016 | 72 | 2016 |
New method for parameter extraction in deep submicrometer MOSFETs C Mourrain, B Cretu, G Ghibaudo, P Cottin ICMTS 2000. Proceedings of the 2000 International Conference on …, 2000 | 67 | 2000 |
Low temperature noise spectroscopy of 0.1 μm partially depleted silicon on insulator metal-oxide-semiconductor field effect transistors I Lartigau, JM Routoure, W Guo, B Cretu, R Carin, A Mercha, C Claeys, ... Journal of applied physics 101 (10), 2007 | 57 | 2007 |
Low-Frequency Noise Assessment of Silicon Passivated Ge pMOSFETs With TiN/TaN/ Gate Stack W Guo, G Nicholas, B Kaczer, RM Todi, B De Jaeger, C Claeys, A Mercha, ... IEEE electron device letters 28 (4), 288-291, 2007 | 47 | 2007 |
Low frequency noise characterization in n-channel FinFETs R Talmat, H Achour, B Cretu, JM Routoure, A Benfdila, R Carin, N Collaert, ... Solid-state electronics 70, 20-26, 2012 | 41 | 2012 |
Low-frequency noise assessment in advanced UTBOX SOI nMOSFETs with different gate dielectrics SD Dos Santos, B Cretu, V Strobel, JM Routoure, R Carin, JA Martino, ... Solid-state electronics 97, 14-22, 2014 | 36 | 2014 |
Impact of strain and source/drain engineering on the low frequency noise behaviour in n-channel tri-gate FinFETs W Guo, B Cretu, JM Routoure, R Carin, E Simoen, A Mercha, N Collaert, ... Solid-State Electronics 52 (12), 1889-1894, 2008 | 33 | 2008 |
New ratio method for effective channel length and threshold voltage extraction in MOS transistors B Cretu, T Boutchacha, G Ghibaudo, F Balestra Electronics Letters 37 (11), 717-719, 2001 | 33 | 2001 |
Determination of interface state distribution in polysilicon thin film transistors from low-frequency noise measurements: Application to analysis of electrical properties L Pichon, A Boukhenoufa, C Cordier, B Cretu Journal of applied physics 100 (5), 2006 | 31 | 2006 |
Low frequency noise assessment in n-and p-channel sub-10 nm triple-gate FinFETs: Part I: Theory and methodology D Boudier, B Cretu, E Simoen, R Carin, A Veloso, N Collaert, A Thean Solid-State Electronics 128, 102-108, 2017 | 30 | 2017 |
DC and low frequency noise performances of SOI p-FinFETs at very low temperature H Achour, R Talmat, B Cretu, JM Routoure, A Benfdila, R Carin, N Collaert, ... Solid-state electronics 90, 160-165, 2013 | 30 | 2013 |
Detailed characterisation of Si gate-all-around nanowire MOSFETs at cryogenic temperatures D Boudier, B Cretu, E Simoen, A Veloso, N Collaert Solid-State Electronics 143, 27-32, 2018 | 26 | 2018 |
Si/SiGe superlattice I/O FinFETs in a vertically-stacked gate-all-around horizontal nanowire technology G Hellings, H Mertens, A Subirats, E Simoen, T Schram, LA Ragnarsson, ... 2018 IEEE Symposium on VLSI Technology, 85-86, 2018 | 22 | 2018 |
Towards single‐trap spectroscopy: Generation‐recombination noise in UTBOX SOI nMOSFETs E Simoen, B Cretu, W Fang, M Aoulaiche, JM Routoure, R Carin, ... physica status solidi (c) 12 (3), 292-298, 2015 | 22 | 2015 |
Low frequency noise assessment in n-and p-channel sub-10 nm triple-gate FinFETs: Part II: Measurements and results D Boudier, B Cretu, E Simoen, R Carin, A Veloso, N Collaert, A Thean Solid-State Electronics 128, 109-114, 2017 | 20 | 2017 |
Low frequency noise analysis on Si/SiGe superlattice I/O n-channel FinFETs D Boudier, B Cretu, E Simoen, G Hellings, T Schram, H Mertens, D Linten Solid-State Electronics 168, 107732, 2020 | 17 | 2020 |
Assessment of DC and low-frequency noise performances of triple-gate FinFETs at cryogenic temperatures B Cretu, D Boudier, E Simoen, A Veloso, N Collaert Semiconductor Science and Technology 31 (12), 124006, 2016 | 16 | 2016 |
In depth static and low-frequency noise characterization of n-channel FinFETs on SOI substrates at cryogenic temperature H Achour, B Cretu, JM Routoure, R Carin, R Talmat, A Benfdila, E Simoen, ... Solid-state electronics 98, 12-19, 2014 | 16 | 2014 |
Low-frequency noise studies on fully depleted UTBOX silicon-on-insulator nMOSFETs: challenges and opportunities E Simoen, M Aoulaiche, SD Dos Santos, JA Martino, V Strobel, B Cretu, ... ECS Journal of Solid State Science and Technology 2 (11), Q205, 2013 | 15 | 2013 |
Thorough characterization of deep-submicron surface and buried channel pMOSFETs B Cretu, M Fadlallah, G Ghibaudo, J Jomaah, F Balestra, G Guégan Solid-State Electronics 46 (7), 971-975, 2002 | 14 | 2002 |