| Algorithm and architecture design of random Fourier features-based kernel adaptive filters VC Gogineni, R Sambangi, D Alex, S Mula, S Werner IEEE Transactions on Circuits and Systems I: Regular Papers 70 (2), 833-845, 2022 | 9 | 2022 |
| Congestion-Aware Vertical Link Placement and Application Mapping Onto Three-Dimensional Network-On-Chip Architectures S Ramesh, K Manna, VC Gogineni, S Chattopadhyay, S Mahapatra IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 8 | 2024 |
| Application mapping onto manycore processor architectures using active search framework R Sambangi, AS Pandey, K Manna, S Mahapatra, S Chattopadhyay IEEE Transactions on Very Large Scale Integration (VLSI) Systems 31 (6), 789-801, 2023 | 5 | 2023 |
| LPNet: A DNN based latency prediction technique for application mapping in network-on-chip design R Sambangi, H Manghnani, S Chattopadhyay Microprocessors and Microsystems 87, 104370, 2021 | 5 | 2021 |
| Application mapping of fully connected 3D NoC using latency prediction model R Sambangi, B Hari Krishnan, K Manna, S Chattopadhyay, S Mahapatra Emerging Electronic Devices, Circuits and Systems: Select Proceedings of …, 2023 | 1 | 2023 |
| 3D Design & Optimization Multiobjective Optimization for PSIJ Mitigation and Impedance Improvement Based on PCPS/DR-NSDE in Chiplet-Based 2.5-D Systems … S Ramesh, K Manna, VC Gogineni, S Chattopadhyay, S Mahapatra, ... | | |
Sudipta MahapatraProfessor, E & ECE, IIT KharagpurVerified email at ece.iitkgp.ac.in
